From 4ed3c07c30248471f6261968e6c3254b7a6167b3 Mon Sep 17 00:00:00 2001 From: planeflight Date: Thu, 5 Feb 2026 21:30:14 -0800 Subject: [PATCH 01/31] Neopixel initial code --- .vscode/launch.json | 31 ++ .vscode/tasks.json | 9 + CMakeLists.txt | 26 +- G4NEOTESTING/CMakeLists.txt | 51 +++ G4NEOTESTING/Core/Inc/adc.h | 49 +++ G4NEOTESTING/Core/Inc/crc.h | 51 +++ G4NEOTESTING/Core/Inc/dma.h | 51 +++ G4NEOTESTING/Core/Inc/fdcan.h | 51 +++ G4NEOTESTING/Core/Inc/gpio.h | 48 +++ G4NEOTESTING/Core/Inc/i2c.h | 49 +++ G4NEOTESTING/Core/Inc/main.h | 115 ++++++ G4NEOTESTING/Core/Inc/spi.h | 49 +++ G4NEOTESTING/Core/Inc/stm32_assert.h | 52 +++ G4NEOTESTING/Core/Inc/stm32g4xx_hal_conf.h | 390 ++++++++++++++++++ G4NEOTESTING/Core/Inc/stm32g4xx_it.h | 67 +++ G4NEOTESTING/Core/Inc/tim.h | 49 +++ G4NEOTESTING/Core/Inc/usart.h | 50 +++ G4NEOTESTING/Core/Src/adc.c | 186 +++++++++ G4NEOTESTING/Core/Src/crc.c | 86 ++++ G4NEOTESTING/Core/Src/dma.c | 50 +++ G4NEOTESTING/Core/Src/fdcan.c | 133 ++++++ G4NEOTESTING/Core/Src/gpio.c | 260 ++++++++++++ G4NEOTESTING/Core/Src/i2c.c | 92 +++++ G4NEOTESTING/Core/Src/main.c | 202 +++++++++ G4NEOTESTING/Core/Src/spi.c | 95 +++++ G4NEOTESTING/Core/Src/stm32g4xx_hal_msp.c | 86 ++++ G4NEOTESTING/Core/Src/stm32g4xx_it.c | 212 ++++++++++ G4NEOTESTING/Core/Src/syscalls.c | 165 ++++++++ G4NEOTESTING/Core/Src/sysmem.c | 77 ++++ G4NEOTESTING/Core/Src/system_stm32g4xx.c | 289 +++++++++++++ G4NEOTESTING/Core/Src/tim.c | 79 ++++ G4NEOTESTING/Core/Src/usart.c | 184 +++++++++ G4NEOTESTING/G4PERTESTING.ioc | 382 +++++++++++++++++ G4NEOTESTING/README.md | 5 + .../NeoPixel/Inc/gr_neopixel.h | 55 +++ .../NeoPixel/Src/gr_neopixel.c | 24 ++ .../NeoPixel/neopixel.cmake | 7 + 37 files changed, 3845 insertions(+), 12 deletions(-) create mode 100644 G4NEOTESTING/CMakeLists.txt create mode 100644 G4NEOTESTING/Core/Inc/adc.h create mode 100644 G4NEOTESTING/Core/Inc/crc.h create mode 100644 G4NEOTESTING/Core/Inc/dma.h create mode 100644 G4NEOTESTING/Core/Inc/fdcan.h create mode 100644 G4NEOTESTING/Core/Inc/gpio.h create mode 100644 G4NEOTESTING/Core/Inc/i2c.h create mode 100644 G4NEOTESTING/Core/Inc/main.h create mode 100644 G4NEOTESTING/Core/Inc/spi.h create mode 100644 G4NEOTESTING/Core/Inc/stm32_assert.h create mode 100644 G4NEOTESTING/Core/Inc/stm32g4xx_hal_conf.h create mode 100644 G4NEOTESTING/Core/Inc/stm32g4xx_it.h create mode 100644 G4NEOTESTING/Core/Inc/tim.h create mode 100644 G4NEOTESTING/Core/Inc/usart.h create mode 100644 G4NEOTESTING/Core/Src/adc.c create mode 100644 G4NEOTESTING/Core/Src/crc.c create mode 100644 G4NEOTESTING/Core/Src/dma.c create mode 100644 G4NEOTESTING/Core/Src/fdcan.c create mode 100644 G4NEOTESTING/Core/Src/gpio.c create mode 100644 G4NEOTESTING/Core/Src/i2c.c create mode 100644 G4NEOTESTING/Core/Src/main.c create mode 100644 G4NEOTESTING/Core/Src/spi.c create mode 100644 G4NEOTESTING/Core/Src/stm32g4xx_hal_msp.c create mode 100644 G4NEOTESTING/Core/Src/stm32g4xx_it.c create mode 100644 G4NEOTESTING/Core/Src/syscalls.c create mode 100644 G4NEOTESTING/Core/Src/sysmem.c create mode 100644 G4NEOTESTING/Core/Src/system_stm32g4xx.c create mode 100644 G4NEOTESTING/Core/Src/tim.c create mode 100644 G4NEOTESTING/Core/Src/usart.c create mode 100644 G4NEOTESTING/G4PERTESTING.ioc create mode 100644 G4NEOTESTING/README.md create mode 100644 Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h create mode 100644 Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c create mode 100644 Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake diff --git a/.vscode/launch.json b/.vscode/launch.json index d2c158491..154c89dde 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -312,6 +312,37 @@ } ] } + }, + { + "cwd": "${workspaceFolder}", + "executable": "${command:cmake.buildDirectory}/G4NEOTESTING.elf", + "name": "G4NEOTESTING", + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "configFiles": [ + "interface/stlink.cfg", + "target/stm32g4x.cfg" + ], + "searchDir": [], + "preLaunchTask": "CMake: configure and build G4CANTESTING", + "showDevDebugOutput": "raw", + "svdPath": "${workspaceFolder}/Lib/Vendor/CMSIS_5/SVD/STM32G474.svd", + "swoConfig": { + "enabled": true, + "cpuFrequency": 160000000, + "swoFrequency": 2000000, + "source": "probe", + "decoders": [ + { + "type": "console", + "label": "ITM", + "showOnStartup": true, + "port": 0, + "encoding": "ascii" + } + ] + } } ] } diff --git a/.vscode/tasks.json b/.vscode/tasks.json index da3d7ad1d..c254e6b15 100644 --- a/.vscode/tasks.json +++ b/.vscode/tasks.json @@ -63,6 +63,15 @@ ], "command": "cmake --build --preset ${command:cmake.activeBuildPresetName} --target G4CANTESTING" }, + { + "label": "CMake: configure and build G4NEOTESTING", + "type": "shell", + "dependsOrder": "sequence", + "dependsOn": [ + "CMake: configure" + ], + "command": "cmake --build build/${command:cmake.activeBuildPresetName} --target G4NEOTESTING" + }, { "label": "CMake: configure and build G4BLINKY", "type": "shell", diff --git a/CMakeLists.txt b/CMakeLists.txt index ef62927ea..3acf958d9 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -47,6 +47,7 @@ include("${lib_path}/Utils/BitManipulations/bit-utils.cmake") include("${lib_path}/Peripherals/USART/common.cmake") include("${lib_path}/Peripherals/CAN/common.cmake") include("${lib_path}/FancyLayers-RENAME/ADC/adc.cmake") +include("${lib_path}/FancyLayers-RENAME/NeoPixel/neopixel.cmake") message( STATUS @@ -63,21 +64,22 @@ message( ) # Projects -add_gr_project(STM32G474xE ECU) -add_gr_project(STM32G474xE CCU) -add_gr_project(STM32G474xE AnalogCalibration) +#add_gr_project(STM32G474xE ECU) +#add_gr_project(STM32G474xE CCU) +#add_gr_project(STM32G474xE AnalogCalibration) # Development -add_gr_project(STM32G474xE G4ADCTESTING) -add_gr_project(STM32G474xE G4PERTESTING) -add_gr_project(STM32G474xE G4CANTESTING) +#add_gr_project(STM32G474xE G4ADCTESTING) +#add_gr_project(STM32G474xE G4PERTESTING) +#add_gr_project(STM32G474xE G4CANTESTING) +add_gr_project(STM32G474xE G4NEOTESTING) # BLINKY Demos -add_gr_project(STM32G474xE BLINKY G4HELLO) -add_gr_project(STM32G474xE BLINKY G4BLINKY) -add_gr_project(STM32U5A9xJ BLINKY U5BLINKY) -add_gr_project(STM32L476xG BLINKY L4BLINKY) +#add_gr_project(STM32G474xE BLINKY G4HELLO) +#add_gr_project(STM32G474xE BLINKY G4BLINKY) +#add_gr_project(STM32U5A9xJ BLINKY U5BLINKY) +#add_gr_project(STM32L476xG BLINKY L4BLINKY) # Onboarding Workshops -add_gr_project(STM32G474xE Onboarding W3_G4SPI_Receive) -add_gr_project(STM32G474xE Onboarding W3_G4SPI_Transmit) +#add_gr_project(STM32G474xE Onboarding W3_G4SPI_Receive) +#add_gr_project(STM32G474xE Onboarding W3_G4SPI_Transmit) diff --git a/G4NEOTESTING/CMakeLists.txt b/G4NEOTESTING/CMakeLists.txt new file mode 100644 index 000000000..4370527c9 --- /dev/null +++ b/G4NEOTESTING/CMakeLists.txt @@ -0,0 +1,51 @@ +cmake_minimum_required(VERSION 3.25) + +# Setup compiler settings +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) +set(CMAKE_C_EXTENSIONS ON) + +# Define the build type +if(NOT CMAKE_BUILD_TYPE) + set(CMAKE_BUILD_TYPE "Debug") +endif() + +# Enable compile command to ease indexing with e.g. clangd +set(CMAKE_EXPORT_COMPILE_COMMANDS TRUE) + +# Enable CMake support for ASM and C languages +enable_language( + C + ASM +) + +# Core project settings +project(${CMAKE_PROJECT_NAME}) + +# what, does in fact not get the filename of somthing but rather the name of the project from the path +get_filename_component(PROJECT_NAME ${CMAKE_CURRENT_SOURCE_DIR} NAME) + +add_library(${PROJECT_NAME}_USER_CODE INTERFACE) +target_sources( + ${PROJECT_NAME}_USER_CODE + INTERFACE + Core/Src/adc.c + Core/Src/crc.c + Core/Src/dma.c + Core/Src/fdcan.c + Core/Src/gpio.c + Core/Src/i2c.c + Core/Src/main.c + Core/Src/spi.c + Core/Src/stm32g4xx_hal_msp.c + Core/Src/stm32g4xx_it.c + Core/Src/syscalls.c + Core/Src/sysmem.c + Core/Src/system_stm32g4xx.c + Core/Src/tim.c + Core/Src/usart.c +) + +target_link_libraries(${PROJECT_NAME}_USER_CODE INTERFACE GR_NEOPIXEL) + +target_include_directories(${PROJECT_NAME}_USER_CODE INTERFACE Core/Inc) diff --git a/G4NEOTESTING/Core/Inc/adc.h b/G4NEOTESTING/Core/Inc/adc.h new file mode 100644 index 000000000..41154538b --- /dev/null +++ b/G4NEOTESTING/Core/Inc/adc.h @@ -0,0 +1,49 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file adc.h + * @brief This file contains all the function prototypes for + * the adc.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __ADC_H__ +#define __ADC_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_ADC1_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __ADC_H__ */ diff --git a/G4NEOTESTING/Core/Inc/crc.h b/G4NEOTESTING/Core/Inc/crc.h new file mode 100644 index 000000000..133957e92 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/crc.h @@ -0,0 +1,51 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file crc.h + * @brief This file contains all the function prototypes for + * the crc.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __CRC_H__ +#define __CRC_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern CRC_HandleTypeDef hcrc; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_CRC_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __CRC_H__ */ diff --git a/G4NEOTESTING/Core/Inc/dma.h b/G4NEOTESTING/Core/Inc/dma.h new file mode 100644 index 000000000..ae819cab4 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/dma.h @@ -0,0 +1,51 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file dma.h + * @brief This file contains all the function prototypes for + * the dma.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __DMA_H__ +#define __DMA_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* DMA memory to memory transfer handles -------------------------------------*/ + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_DMA_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __DMA_H__ */ diff --git a/G4NEOTESTING/Core/Inc/fdcan.h b/G4NEOTESTING/Core/Inc/fdcan.h new file mode 100644 index 000000000..56c4a8adb --- /dev/null +++ b/G4NEOTESTING/Core/Inc/fdcan.h @@ -0,0 +1,51 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file fdcan.h + * @brief This file contains all the function prototypes for + * the fdcan.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __FDCAN_H__ +#define __FDCAN_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern FDCAN_HandleTypeDef hfdcan2; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_FDCAN2_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __FDCAN_H__ */ diff --git a/G4NEOTESTING/Core/Inc/gpio.h b/G4NEOTESTING/Core/Inc/gpio.h new file mode 100644 index 000000000..843d4e9e7 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/gpio.h @@ -0,0 +1,48 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file gpio.h + * @brief This file contains all the function prototypes for + * the gpio.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_GPIO_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ GPIO_H__ */ diff --git a/G4NEOTESTING/Core/Inc/i2c.h b/G4NEOTESTING/Core/Inc/i2c.h new file mode 100644 index 000000000..0a0a50803 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/i2c.h @@ -0,0 +1,49 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file i2c.h + * @brief This file contains all the function prototypes for + * the i2c.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __I2C_H__ +#define __I2C_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_I2C2_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __I2C_H__ */ diff --git a/G4NEOTESTING/Core/Inc/main.h b/G4NEOTESTING/Core/Inc/main.h new file mode 100644 index 000000000..23d7ffce4 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/main.h @@ -0,0 +1,115 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_hal.h" +#include "stm32g4xx_ll_adc.h" +#include "stm32g4xx_ll_bus.h" +#include "stm32g4xx_ll_cortex.h" +#include "stm32g4xx_ll_crs.h" +#include "stm32g4xx_ll_dma.h" +#include "stm32g4xx_ll_exti.h" +#include "stm32g4xx_ll_gpio.h" +#include "stm32g4xx_ll_i2c.h" +#include "stm32g4xx_ll_lpuart.h" +#include "stm32g4xx_ll_pwr.h" +#include "stm32g4xx_ll_rcc.h" +#include "stm32g4xx_ll_spi.h" +#include "stm32g4xx_ll_system.h" +#include "stm32g4xx_ll_tim.h" +#include "stm32g4xx_ll_usart.h" +#include "stm32g4xx_ll_utils.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define BSPD_SIGNAL_Pin LL_GPIO_PIN_1 +#define BSPD_SIGNAL_GPIO_Port GPIOC +#define APPS1_SIGNAL_Pin LL_GPIO_PIN_2 +#define APPS1_SIGNAL_GPIO_Port GPIOC +#define APPS2_SIGNAL_Pin LL_GPIO_PIN_3 +#define APPS2_SIGNAL_GPIO_Port GPIOC +#define BLINKY_Pin LL_GPIO_PIN_5 +#define BLINKY_GPIO_Port GPIOA +#define IMD_SENSE_Pin LL_GPIO_PIN_6 +#define IMD_SENSE_GPIO_Port GPIOA +#define AMS_SENSE_Pin LL_GPIO_PIN_7 +#define AMS_SENSE_GPIO_Port GPIOA +#define BRAKE_F_SIGNAL_Pin LL_GPIO_PIN_0 +#define BRAKE_F_SIGNAL_GPIO_Port GPIOB +#define BRAKE_R_SIGNAL_Pin LL_GPIO_PIN_1 +#define BRAKE_R_SIGNAL_GPIO_Port GPIOB +#define LED_TEST_Pin LL_GPIO_PIN_11 +#define LED_TEST_GPIO_Port GPIOB +#define AUX_SIGNAL_Pin LL_GPIO_PIN_14 +#define AUX_SIGNAL_GPIO_Port GPIOB +#define STEERING_ANGLE_Pin LL_GPIO_PIN_15 +#define STEERING_ANGLE_GPIO_Port GPIOB +#define BRAKE_LIGHT_Pin LL_GPIO_PIN_4 +#define BRAKE_LIGHT_GPIO_Port GPIOB +#define TSSI_G_CONTROL_Pin LL_GPIO_PIN_5 +#define TSSI_G_CONTROL_GPIO_Port GPIOB +#define AUX_CONTROL_Pin LL_GPIO_PIN_8 +#define AUX_CONTROL_GPIO_Port GPIOB +#define SOFTWARE_OK_CONTROL_Pin LL_GPIO_PIN_9 +#define SOFTWARE_OK_CONTROL_GPIO_Port GPIOB + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/G4NEOTESTING/Core/Inc/spi.h b/G4NEOTESTING/Core/Inc/spi.h new file mode 100644 index 000000000..74bed003b --- /dev/null +++ b/G4NEOTESTING/Core/Inc/spi.h @@ -0,0 +1,49 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file spi.h + * @brief This file contains all the function prototypes for + * the spi.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __SPI_H__ +#define __SPI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SPI3_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __SPI_H__ */ diff --git a/G4NEOTESTING/Core/Inc/stm32_assert.h b/G4NEOTESTING/Core/Inc/stm32_assert.h new file mode 100644 index 000000000..92460620f --- /dev/null +++ b/G4NEOTESTING/Core/Inc/stm32_assert.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32_assert.h + * @author MCD Application Team + * @brief STM32 assert file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_ASSERT_H +#define __STM32_ASSERT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Includes ------------------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32_ASSERT_H */ diff --git a/G4NEOTESTING/Core/Inc/stm32g4xx_hal_conf.h b/G4NEOTESTING/Core/Inc/stm32g4xx_hal_conf.h new file mode 100644 index 000000000..3e1fcb018 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/stm32g4xx_hal_conf.h @@ -0,0 +1,390 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_HAL_CONF_H +#define STM32G4xx_HAL_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED + +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CORDIC_MODULE_ENABLED */ +#define HAL_CRC_MODULE_ENABLED +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +#define HAL_FDCAN_MODULE_ENABLED +/*#define HAL_FMAC_MODULE_ENABLED */ +/*#define HAL_HRTIM_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_UART_MODULE_ENABLED */ +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Register Callbacks selection + * ############################## */ +/** + * @brief This is the list of modules where register callback can be used + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U +#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U +#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U +#define USE_HAL_UART_REGISTER_CALLBACKS 0U +#define USE_HAL_USART_REGISTER_CALLBACKS 0U +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U + +/* ########################## Oscillator Values adaptation + * ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your + * application. This value is used by the RCC HAL module to compute the system + * frequency (when HSE is used as system clock source, directly or through the + * PLL). + */ +#if !defined(HSE_VALUE) +#define HSE_VALUE (16000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(HSE_STARTUP_TIMEOUT) +#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system + * frequency (when HSI is used as system clock source, directly or through the + * PLL). + */ +#if !defined(HSI_VALUE) +#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG. + * This internal oscillator is mainly dedicated to provide a high + * precision clock to the USB peripheral by means of a special Clock Recovery + * System (CRS) circuitry. When the CRS is not used, the HSI48 RC oscillator + * runs on it default frequency which is subject to manufacturing process + * variations. + */ +#if !defined(HSI48_VALUE) +#define HSI48_VALUE \ + (48000000UL) /*!< Value of the Internal High Speed oscillator for USB \ + FS/RNG in Hz. The real value my vary depending on \ + manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined(LSI_VALUE) +/*!< Value of the Internal Low Speed oscillator in Hz +The real value may vary depending on the variations in voltage and +temperature.*/ +#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system + * frequency + */ +#if !defined(LSE_VALUE) +#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined(LSE_STARTUP_TIMEOUT) +#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S and SAI peripherals + * This value is used by the I2S and SAI HAL modules to compute the I2S + * and SAI clock source frequency, this source is inserted directly through + * I2S_CKIN pad. + */ +#if !defined(EXTERNAL_CLOCK_VALUE) +#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ + +#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver + * Activated: CRC code is present inside driver + * Deactivated: CRC code cleaned from driver + */ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED +#include "stm32g4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED +#include "stm32g4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED +#include "stm32g4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED +#include "stm32g4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED +#include "stm32g4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED +#include "stm32g4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED +#include "stm32g4xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED +#include "stm32g4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED +#include "stm32g4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED +#include "stm32g4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32g4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED +#include "stm32g4xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED +#include "stm32g4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED +#include "stm32g4xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED +#include "stm32g4xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED +#include "stm32g4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED +#include "stm32g4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED +#include "stm32g4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED +#include "stm32g4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32g4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED +#include "stm32g4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED +#include "stm32g4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32g4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED +#include "stm32g4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED +#include "stm32g4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED +#include "stm32g4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED +#include "stm32g4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED +#include "stm32g4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED +#include "stm32g4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED +#include "stm32g4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED +#include "stm32g4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED +#include "stm32g4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED +#include "stm32g4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED +#include "stm32g4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED +#include "stm32g4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED +#include "stm32g4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED +#include "stm32g4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_HAL_CONF_H */ diff --git a/G4NEOTESTING/Core/Inc/stm32g4xx_it.h b/G4NEOTESTING/Core/Inc/stm32g4xx_it.h new file mode 100644 index 000000000..b6c3b2f72 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/stm32g4xx_it.h @@ -0,0 +1,67 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_IT_H +#define __STM32G4xx_IT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void FDCAN2_IT0_IRQHandler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_IT_H */ diff --git a/G4NEOTESTING/Core/Inc/tim.h b/G4NEOTESTING/Core/Inc/tim.h new file mode 100644 index 000000000..c19e6cc71 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/tim.h @@ -0,0 +1,49 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file tim.h + * @brief This file contains all the function prototypes for + * the tim.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __TIM_H__ +#define __TIM_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_TIM2_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __TIM_H__ */ diff --git a/G4NEOTESTING/Core/Inc/usart.h b/G4NEOTESTING/Core/Inc/usart.h new file mode 100644 index 000000000..daefd73e6 --- /dev/null +++ b/G4NEOTESTING/Core/Inc/usart.h @@ -0,0 +1,50 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.h + * @brief This file contains all the function prototypes for + * the usart.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USART_H__ +#define __USART_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_LPUART1_UART_Init(void); +void MX_USART1_UART_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USART_H__ */ diff --git a/G4NEOTESTING/Core/Src/adc.c b/G4NEOTESTING/Core/Src/adc.c new file mode 100644 index 000000000..f3dbff8ed --- /dev/null +++ b/G4NEOTESTING/Core/Src/adc.c @@ -0,0 +1,186 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file adc.c + * @brief This file provides code for the configuration + * of the ADC instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "adc.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* ADC1 init function */ +void MX_ADC1_Init(void) +{ + + /* USER CODE BEGIN ADC1_Init 0 */ + + /* USER CODE END ADC1_Init 0 */ + + LL_ADC_InitTypeDef ADC_InitStruct = {0}; + LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0}; + LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_RCC_SetADCClockSource(LL_RCC_ADC12_CLKSOURCE_SYSCLK); + + /* Peripheral clock enable */ + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC12); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); + /**ADC1 GPIO Configuration + PC1 ------> ADC1_IN7 + PC2 ------> ADC1_IN8 + PC3 ------> ADC1_IN9 + PB0 ------> ADC1_IN15 + PB1 ------> ADC1_IN12 + PB14 ------> ADC1_IN5 + */ + GPIO_InitStruct.Pin = BSPD_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(BSPD_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = APPS1_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(APPS1_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = APPS2_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(APPS2_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = BRAKE_F_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(BRAKE_F_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = BRAKE_R_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(BRAKE_R_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = AUX_SIGNAL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(AUX_SIGNAL_GPIO_Port, &GPIO_InitStruct); + + /* ADC1 DMA Init */ + + /* ADC1 Init */ + LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC1); + + LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); + + LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_LOW); + + LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR); + + LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT); + + LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT); + + LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_HALFWORD); + + LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD); + + /* USER CODE BEGIN ADC1_Init 1 */ + + /* USER CODE END ADC1_Init 1 */ + + /** Common config + */ + ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B; + ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT; + ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE; + LL_ADC_Init(ADC1, &ADC_InitStruct); + ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE; + ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS; + ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE; + ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS; + ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED; + ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED; + LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct); + LL_ADC_SetGainCompensation(ADC1, 0); + LL_ADC_SetOverSamplingScope(ADC1, LL_ADC_OVS_DISABLE); + ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_ASYNC_DIV256; + ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT; + LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct); + + /* Disable ADC deep power down (enabled by default after reset state) */ + LL_ADC_DisableDeepPowerDown(ADC1); + /* Enable ADC internal voltage regulator */ + LL_ADC_EnableInternalRegulator(ADC1); + /* Delay for ADC internal voltage regulator stabilization. */ + /* Compute number of CPU cycles to wait for, from delay in us. */ + /* Note: Variable divided by 2 to compensate partially */ + /* CPU processing cycles (depends on compilation optimization). */ + /* Note: If system core clock frequency is below 200kHz, wait time */ + /* is only a few CPU processing cycles. */ + uint32_t wait_loop_index; + wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10); + while (wait_loop_index != 0) { + wait_loop_index--; + } + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_5); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_5, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_5, LL_ADC_SINGLE_ENDED); + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_7); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_7, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_7, LL_ADC_SINGLE_ENDED); + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_3, LL_ADC_CHANNEL_8); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SINGLE_ENDED); + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_4, LL_ADC_CHANNEL_9); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_9, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_9, LL_ADC_SINGLE_ENDED); + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_5, LL_ADC_CHANNEL_12); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SINGLE_ENDED); + + /** Configure Regular Channel + */ + LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_6, LL_ADC_CHANNEL_15); + LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_15, LL_ADC_SAMPLINGTIME_92CYCLES_5); + LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_15, LL_ADC_SINGLE_ENDED); + /* USER CODE BEGIN ADC1_Init 2 */ + + /* USER CODE END ADC1_Init 2 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/crc.c b/G4NEOTESTING/Core/Src/crc.c new file mode 100644 index 000000000..213510a5d --- /dev/null +++ b/G4NEOTESTING/Core/Src/crc.c @@ -0,0 +1,86 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file crc.c + * @brief This file provides code for the configuration + * of the CRC instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "crc.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +CRC_HandleTypeDef hcrc; + +/* CRC init function */ +void MX_CRC_Init(void) +{ + + /* USER CODE BEGIN CRC_Init 0 */ + + /* USER CODE END CRC_Init 0 */ + + /* USER CODE BEGIN CRC_Init 1 */ + + /* USER CODE END CRC_Init 1 */ + hcrc.Instance = CRC; + hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; + hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; + hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE; + hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE; + hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; + if (HAL_CRC_Init(&hcrc) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN CRC_Init 2 */ + + /* USER CODE END CRC_Init 2 */ +} + +void HAL_CRC_MspInit(CRC_HandleTypeDef *crcHandle) +{ + + if (crcHandle->Instance == CRC) { + /* USER CODE BEGIN CRC_MspInit 0 */ + + /* USER CODE END CRC_MspInit 0 */ + /* CRC clock enable */ + __HAL_RCC_CRC_CLK_ENABLE(); + /* USER CODE BEGIN CRC_MspInit 1 */ + + /* USER CODE END CRC_MspInit 1 */ + } +} + +void HAL_CRC_MspDeInit(CRC_HandleTypeDef *crcHandle) +{ + + if (crcHandle->Instance == CRC) { + /* USER CODE BEGIN CRC_MspDeInit 0 */ + + /* USER CODE END CRC_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_CRC_CLK_DISABLE(); + /* USER CODE BEGIN CRC_MspDeInit 1 */ + + /* USER CODE END CRC_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/dma.c b/G4NEOTESTING/Core/Src/dma.c new file mode 100644 index 000000000..491e3889d --- /dev/null +++ b/G4NEOTESTING/Core/Src/dma.c @@ -0,0 +1,50 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file dma.c + * @brief This file provides code for the configuration + * of all the requested memory to memory DMA transfers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "dma.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure DMA */ +/*----------------------------------------------------------------------------*/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** + * Enable DMA controller clock + */ +void MX_DMA_Init(void) +{ + + /* Init with LL driver */ + /* DMA controller clock enable */ + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1); + LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ diff --git a/G4NEOTESTING/Core/Src/fdcan.c b/G4NEOTESTING/Core/Src/fdcan.c new file mode 100644 index 000000000..f39dbfa2b --- /dev/null +++ b/G4NEOTESTING/Core/Src/fdcan.c @@ -0,0 +1,133 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file fdcan.c + * @brief This file provides code for the configuration + * of the FDCAN instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "fdcan.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +FDCAN_HandleTypeDef hfdcan2; + +/* FDCAN2 init function */ +void MX_FDCAN2_Init(void) +{ + + /* USER CODE BEGIN FDCAN2_Init 0 */ + + /* USER CODE END FDCAN2_Init 0 */ + + /* USER CODE BEGIN FDCAN2_Init 1 */ + + /* USER CODE END FDCAN2_Init 1 */ + hfdcan2.Instance = FDCAN2; + hfdcan2.Init.ClockDivider = FDCAN_CLOCK_DIV1; + hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC; + hfdcan2.Init.Mode = FDCAN_MODE_NORMAL; + hfdcan2.Init.AutoRetransmission = ENABLE; + hfdcan2.Init.TransmitPause = DISABLE; + hfdcan2.Init.ProtocolException = ENABLE; + hfdcan2.Init.NominalPrescaler = 1; + hfdcan2.Init.NominalSyncJumpWidth = 16; + hfdcan2.Init.NominalTimeSeg1 = 119; + hfdcan2.Init.NominalTimeSeg2 = 40; + hfdcan2.Init.DataPrescaler = 8; + hfdcan2.Init.DataSyncJumpWidth = 16; + hfdcan2.Init.DataTimeSeg1 = 14; + hfdcan2.Init.DataTimeSeg2 = 5; + hfdcan2.Init.StdFiltersNbr = 0; + hfdcan2.Init.ExtFiltersNbr = 2; + hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; + if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) { + Error_Handler(); + } + /* USER CODE BEGIN FDCAN2_Init 2 */ + + /* USER CODE END FDCAN2_Init 2 */ +} + +void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef *fdcanHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if (fdcanHandle->Instance == FDCAN2) { + /* USER CODE BEGIN FDCAN2_MspInit 0 */ + + /* USER CODE END FDCAN2_MspInit 0 */ + LL_RCC_SetFDCANClockSource(LL_RCC_FDCAN_CLKSOURCE_PCLK1); + + /* FDCAN2 clock enable */ + __HAL_RCC_FDCAN_CLK_ENABLE(); + + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**FDCAN2 GPIO Configuration + PB12 ------> FDCAN2_RX + PB13 ------> FDCAN2_TX + */ + GPIO_InitStruct.Pin = GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* FDCAN2 interrupt Init */ + HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); + /* USER CODE BEGIN FDCAN2_MspInit 1 */ + + /* USER CODE END FDCAN2_MspInit 1 */ + } +} + +void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef *fdcanHandle) +{ + + if (fdcanHandle->Instance == FDCAN2) { + /* USER CODE BEGIN FDCAN2_MspDeInit 0 */ + + /* USER CODE END FDCAN2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_FDCAN_CLK_DISABLE(); + + /**FDCAN2 GPIO Configuration + PB12 ------> FDCAN2_RX + PB13 ------> FDCAN2_TX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12 | GPIO_PIN_13); + + /* FDCAN2 interrupt Deinit */ + HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn); + /* USER CODE BEGIN FDCAN2_MspDeInit 1 */ + + /* USER CODE END FDCAN2_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/gpio.c b/G4NEOTESTING/Core/Src/gpio.c new file mode 100644 index 000000000..d36e6eca6 --- /dev/null +++ b/G4NEOTESTING/Core/Src/gpio.c @@ -0,0 +1,260 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file gpio.c + * @brief This file provides code for the configuration + * of all used GPIO pins. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "gpio.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure GPIO */ +/*----------------------------------------------------------------------------*/ +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** Configure pins as + * Analog + * Input + * Output + * EVENT_OUT + * EXTI + * Free pins are configured automatically as Analog (this feature is + enabled through + * the Code Generation settings) + PA6 ------> ADC2_IN3 + PA7 ------> ADC2_IN4 + PB15 ------> ADC2_IN15 + PB7 ------> UART4_CTS +*/ +void MX_GPIO_Init(void) +{ + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOF); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOG); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD); + + /**/ + LL_GPIO_ResetOutputPin(BLINKY_GPIO_Port, BLINKY_Pin); + + /**/ + LL_GPIO_ResetOutputPin(LED_TEST_GPIO_Port, LED_TEST_Pin); + + /**/ + LL_GPIO_ResetOutputPin(BRAKE_LIGHT_GPIO_Port, BRAKE_LIGHT_Pin); + + /**/ + LL_GPIO_ResetOutputPin(TSSI_G_CONTROL_GPIO_Port, TSSI_G_CONTROL_Pin); + + /**/ + LL_GPIO_ResetOutputPin(AUX_CONTROL_GPIO_Port, AUX_CONTROL_Pin); + + /**/ + LL_GPIO_ResetOutputPin(SOFTWARE_OK_CONTROL_GPIO_Port, SOFTWARE_OK_CONTROL_Pin); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_13; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_14; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_15; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_0; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_1; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_4; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = BLINKY_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(BLINKY_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = IMD_SENSE_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(IMD_SENSE_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = AMS_SENSE_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(AMS_SENSE_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_2; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LED_TEST_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(LED_TEST_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = STEERING_ANGLE_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(STEERING_ANGLE_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_6; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_7; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_8; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_9; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_9; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_15; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_2; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = BRAKE_LIGHT_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(BRAKE_LIGHT_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = TSSI_G_CONTROL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(TSSI_G_CONTROL_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = LL_GPIO_PIN_7; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_14; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = AUX_CONTROL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(AUX_CONTROL_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = SOFTWARE_OK_CONTROL_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + LL_GPIO_Init(SOFTWARE_OK_CONTROL_GPIO_Port, &GPIO_InitStruct); +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ diff --git a/G4NEOTESTING/Core/Src/i2c.c b/G4NEOTESTING/Core/Src/i2c.c new file mode 100644 index 000000000..bfb4e0153 --- /dev/null +++ b/G4NEOTESTING/Core/Src/i2c.c @@ -0,0 +1,92 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file i2c.c + * @brief This file provides code for the configuration + * of the I2C instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "i2c.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* I2C2 init function */ +void MX_I2C2_Init(void) +{ + + /* USER CODE BEGIN I2C2_Init 0 */ + + /* USER CODE END I2C2_Init 0 */ + + LL_I2C_InitTypeDef I2C_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_RCC_SetI2CClockSource(LL_RCC_I2C2_CLKSOURCE_PCLK1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + /**I2C2 GPIO Configuration + PC4 ------> I2C2_SCL + PA8 ------> I2C2_SDA + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_4; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_8; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_4; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2); + + /* USER CODE BEGIN I2C2_Init 1 */ + + /* USER CODE END I2C2_Init 1 */ + + /** I2C Initialization + */ + I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; + I2C_InitStruct.Timing = 0x30D29DE4; + I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; + I2C_InitStruct.DigitalFilter = 0; + I2C_InitStruct.OwnAddress1 = 0; + I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; + I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; + LL_I2C_Init(I2C2, &I2C_InitStruct); + LL_I2C_EnableAutoEndMode(I2C2); + LL_I2C_SetOwnAddress2(I2C2, 0, LL_I2C_OWNADDRESS2_NOMASK); + LL_I2C_DisableOwnAddress2(I2C2); + LL_I2C_DisableGeneralCall(I2C2); + LL_I2C_EnableClockStretching(I2C2); + /* USER CODE BEGIN I2C2_Init 2 */ + + /* USER CODE END I2C2_Init 2 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c new file mode 100644 index 000000000..cabfcdff7 --- /dev/null +++ b/G4NEOTESTING/Core/Src/main.c @@ -0,0 +1,202 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +#include "adc.h" +#include "dma.h" +#include "fdcan.h" +#include "gpio.h" +#include "i2c.h" +#include "spi.h" +#include "tim.h" +#include "usart.h" + +#include "gr_neopixel.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU + * Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the + * Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_DMA_Init(); + MX_FDCAN2_Init(); + MX_ADC1_Init(); + MX_LPUART1_UART_Init(); + MX_I2C2_Init(); + MX_USART1_UART_Init(); + MX_SPI3_Init(); + MX_TIM2_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) { + /* USER CODE END WHILE */ + + // BLINKY + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET); + HAL_Delay(1000); + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET); + HAL_Delay(1000); + + /* USER CODE BEGIN 3 */ + Neopixel_update(); + } +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); + while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4) {} + LL_PWR_EnableRange1BoostMode(); + LL_RCC_HSE_Enable(); + /* Wait till HSE is ready */ + while (LL_RCC_HSE_IsReady() != 1) {} + + LL_RCC_HSE_EnableCSS(); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 20, LL_RCC_PLLR_DIV_2); + LL_RCC_PLL_EnableDomain_SYS(); + LL_RCC_PLL_Enable(); + /* Wait till PLL is ready */ + while (LL_RCC_PLL_IsReady() != 1) {} + + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2); + /* Wait till System clock is ready */ + while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {} + + /* Insure 1us transition state at intermediate medium speed clock*/ + for (__IO uint32_t i = (170 >> 1); i != 0; i--) + ; + + /* Set AHB prescaler*/ + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + LL_SetSystemCoreClock(160000000); + + /* Update the time base */ + if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) { + Error_Handler(); + } +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return + * state */ + __disable_irq(); + while (1) {} + /* USER CODE END Error_Handler_Debug */ +} +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line + number, ex: printf("Wrong parameters value: file %s on line %d\r\n", + file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/G4NEOTESTING/Core/Src/spi.c b/G4NEOTESTING/Core/Src/spi.c new file mode 100644 index 000000000..66459f2ec --- /dev/null +++ b/G4NEOTESTING/Core/Src/spi.c @@ -0,0 +1,95 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file spi.c + * @brief This file provides code for the configuration + * of the SPI instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "spi.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* SPI3 init function */ +void MX_SPI3_Init(void) +{ + + /* USER CODE BEGIN SPI3_Init 0 */ + + /* USER CODE END SPI3_Init 0 */ + + LL_SPI_InitTypeDef SPI_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI3); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + /**SPI3 GPIO Configuration + PC10 ------> SPI3_SCK + PC11 ------> SPI3_MISO + PC12 ------> SPI3_MOSI + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_10; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_11; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_12; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI3_Init 1 */ + + /* USER CODE END SPI3_Init 1 */ + SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; + SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV32; + SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + SPI_InitStruct.CRCPoly = 7; + LL_SPI_Init(SPI3, &SPI_InitStruct); + LL_SPI_SetStandard(SPI3, LL_SPI_PROTOCOL_MOTOROLA); + LL_SPI_EnableNSSPulseMgt(SPI3); + /* USER CODE BEGIN SPI3_Init 2 */ + + /* USER CODE END SPI3_Init 2 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/stm32g4xx_hal_msp.c b/G4NEOTESTING/Core/Src/stm32g4xx_hal_msp.c new file mode 100644 index 000000000..69189ef4e --- /dev/null +++ b/G4NEOTESTING/Core/Src/stm32g4xx_hal_msp.c @@ -0,0 +1,86 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_hal_msp.c + * @brief This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral + */ + HAL_PWREx_DisableUCPDDeadBattery(); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/stm32g4xx_it.c b/G4NEOTESTING/Core/Src/stm32g4xx_it.c new file mode 100644 index 000000000..2f0cf90a7 --- /dev/null +++ b/G4NEOTESTING/Core/Src/stm32g4xx_it.c @@ -0,0 +1,212 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_it.h" + +#include "main.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +extern FDCAN_HandleTypeDef hfdcan2; +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) {} + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32G4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32g4xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles FDCAN2 interrupt 0. + */ +void FDCAN2_IT0_IRQHandler(void) +{ + /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */ + + /* USER CODE END FDCAN2_IT0_IRQn 0 */ + HAL_FDCAN_IRQHandler(&hfdcan2); + /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */ + + /* USER CODE END FDCAN2_IT0_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/syscalls.c b/G4NEOTESTING/Core/Src/syscalls.c new file mode 100644 index 000000000..9b1a4a471 --- /dev/null +++ b/G4NEOTESTING/Core/Src/syscalls.c @@ -0,0 +1,165 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeMX + * @brief Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib libc-manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +char *__env[1] = {0}; +char **environ = __env; + +/* Functions */ +void initialise_monitor_handles() {} + +int _getpid(void) { return 1; } + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +void _exit(int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) { + *ptr++ = __io_getchar(); + } + + return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _open(char *path, int flags, ...) +{ + (void)path; + (void)flags; + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + (void)status; + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + (void)name; + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + (void)buf; + return -1; +} + +int _stat(char *file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + (void)old; + (void)new; + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + (void)name; + (void)argv; + (void)env; + errno = ENOMEM; + return -1; +} diff --git a/G4NEOTESTING/Core/Src/sysmem.c b/G4NEOTESTING/Core/Src/sysmem.c new file mode 100644 index 000000000..00c397937 --- /dev/null +++ b/G4NEOTESTING/Core/Src/sysmem.c @@ -0,0 +1,77 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeMX + * @brief System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/G4NEOTESTING/Core/Src/system_stm32g4xx.c b/G4NEOTESTING/Core/Src/system_stm32g4xx.c new file mode 100644 index 000000000..990865b88 --- /dev/null +++ b/G4NEOTESTING/Core/Src/system_stm32g4xx.c @@ -0,0 +1,289 @@ +/** + ****************************************************************************** + * @file system_stm32g4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32g4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be + *used by the user application to setup the SysTick timer or configure other + *parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | HSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 16 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * Require 48MHz for RNG | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32g4xx_system + * @{ + */ + +/** @addtogroup STM32G4xx_System_Private_Includes + * @{ + */ + +#include "stm32g4xx.h" + +#if !defined(HSE_VALUE) +#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(HSI_VALUE) +#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS \ + SRAM_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS \ + FLASH_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Variables + * @{ + */ +/* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock + frequency Note: If you use this function to configure the system clock; then + there is no need to call the 2 first functions listed above, since + SystemCoreClock variable is updated automatically. +*/ +uint32_t SystemCoreClock = HSI_VALUE; + +const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; +const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ +/* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ +#endif + + /* Configure the Vector Table location add offset address + * ------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or + * configure other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any + * configuration based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the + * HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the + * HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the + * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default + * value 16 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file + * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using + * fractional value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, pllvco, pllr, pllsource, pllm; + + /* Get SYSCLK source + * -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) { + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; + if (pllsource == 0x02UL) /* HSI used as PLL clock source */ + { + pllvco = (HSI_VALUE / pllm); + } else /* HSE used as PLL clock source */ + { + pllvco = (HSE_VALUE / pllm); + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; + SystemCoreClock = pllvco / pllr; + break; + + default: + break; + } + /* Compute HCLK clock frequency + * --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/G4NEOTESTING/Core/Src/tim.c b/G4NEOTESTING/Core/Src/tim.c new file mode 100644 index 000000000..7f521c3bf --- /dev/null +++ b/G4NEOTESTING/Core/Src/tim.c @@ -0,0 +1,79 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file tim.c + * @brief This file provides code for the configuration + * of the TIM instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "tim.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* TIM2 init function */ +void MX_TIM2_Init(void) +{ + + /* USER CODE BEGIN TIM2_Init 0 */ + + /* USER CODE END TIM2_Init 0 */ + + LL_TIM_InitTypeDef TIM_InitStruct = {0}; + LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); + + /* USER CODE BEGIN TIM2_Init 1 */ + + /* USER CODE END TIM2_Init 1 */ + TIM_InitStruct.Prescaler = 0; + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + TIM_InitStruct.Autoreload = 4294967295; + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + LL_TIM_Init(TIM2, &TIM_InitStruct); + LL_TIM_DisableARRPreload(TIM2); + LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_FORCED_ACTIVE; + TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE; + TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE; + TIM_OC_InitStruct.CompareValue = 0; + TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; + LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct); + LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH1); + LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + LL_TIM_DisableMasterSlaveMode(TIM2); + /* USER CODE BEGIN TIM2_Init 2 */ + + /* USER CODE END TIM2_Init 2 */ + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + /**TIM2 GPIO Configuration + PA0 ------> TIM2_CH1 + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_0; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_1; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/usart.c b/G4NEOTESTING/Core/Src/usart.c new file mode 100644 index 000000000..56a3fa98f --- /dev/null +++ b/G4NEOTESTING/Core/Src/usart.c @@ -0,0 +1,184 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.c + * @brief This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "usart.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* LPUART1 init function */ + +void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); + + /* Peripheral clock enable */ + LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_2; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_12; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_3; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_12; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + LPUART_InitStruct.PrescalerValue = LL_LPUART_PRESCALER_DIV1; + LPUART_InitStruct.BaudRate = 115200; + LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_8B; + LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; + LPUART_InitStruct.Parity = LL_LPUART_PARITY_NONE; + LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; + LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; + LL_LPUART_Init(LPUART1, &LPUART_InitStruct); + LL_LPUART_SetTXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); + LL_LPUART_SetRXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); + LL_LPUART_DisableFIFO(LPUART1); + + /* USER CODE BEGIN WKUPType LPUART1 */ + + /* USER CODE END WKUPType LPUART1 */ + + LL_LPUART_Enable(LPUART1); + + /* Polling LPUART1 initialisation */ + while ((!(LL_LPUART_IsActiveFlag_TEACK(LPUART1))) || (!(LL_LPUART_IsActiveFlag_REACK(LPUART1)))) {} + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ +} +/* USART1 init function */ + +void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + LL_USART_InitTypeDef USART_InitStruct = {0}; + + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2); + + /* Peripheral clock enable */ + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); + /**USART1 GPIO Configuration + PC5 ------> USART1_RX + PA11 ------> USART1_CTS + PA12 ------> USART1_RTS + PB6 ------> USART1_TX + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_5; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_11; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_12; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + GPIO_InitStruct.Pin = LL_GPIO_PIN_6; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1; + USART_InitStruct.BaudRate = 115200; + USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + USART_InitStruct.Parity = LL_USART_PARITY_NONE; + USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_RTS_CTS; + USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + LL_USART_Init(USART1, &USART_InitStruct); + LL_USART_SetTXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8); + LL_USART_SetRXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8); + LL_USART_DisableFIFO(USART1); + LL_USART_ConfigAsyncMode(USART1); + + /* USER CODE BEGIN WKUPType USART1 */ + + /* USER CODE END WKUPType USART1 */ + + LL_USART_Enable(USART1); + + /* Polling USART1 initialisation */ + while ((!(LL_USART_IsActiveFlag_TEACK(USART1))) || (!(LL_USART_IsActiveFlag_REACK(USART1)))) {} + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/G4NEOTESTING/G4PERTESTING.ioc b/G4NEOTESTING/G4PERTESTING.ioc new file mode 100644 index 000000000..8cf1860b1 --- /dev/null +++ b/G4NEOTESTING/G4PERTESTING.ioc @@ -0,0 +1,382 @@ +#MicroXplorer Configuration settings - do not modify +ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_5 +ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_7 +ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_8 +ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_9 +ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_12 +ADC1.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_15 +ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV256 +ADC1.CommonPathInternal=null|null|null|null +ADC1.ContinuousConvMode=ENABLE +ADC1.DMAContinuousRequests=ENABLE +ADC1.EOCSelection=ADC_EOC_SEQ_CONV +ADC1.ExternalTrigConv=ADC_SOFTWARE_START +ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,master,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,Rank-7\#ChannelRegularConversion,Channel-7\#ChannelRegularConversion,SamplingTime-7\#ChannelRegularConversion,OffsetNumber-7\#ChannelRegularConversion,NbrOfConversion,ContinuousConvMode,DMAContinuousRequests,ClockPrescaler,EOCSelection,ExternalTrigConv,CommonPathInternal +ADC1.NbrOfConversion=6 +ADC1.NbrOfConversionFlag=1 +ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-6\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.OffsetNumber-7\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC1.Rank-2\#ChannelRegularConversion=1 +ADC1.Rank-3\#ChannelRegularConversion=2 +ADC1.Rank-4\#ChannelRegularConversion=3 +ADC1.Rank-5\#ChannelRegularConversion=4 +ADC1.Rank-6\#ChannelRegularConversion=5 +ADC1.Rank-7\#ChannelRegularConversion=6 +ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 +ADC1.master=1 +CAD.formats=[] +CAD.pinconfig=Dual +CAD.provider= +Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.ADC1.0.EventEnable=DISABLE +Dma.ADC1.0.Instance=DMA1_Channel1 +Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD +Dma.ADC1.0.MemInc=DMA_MINC_ENABLE +Dma.ADC1.0.Mode=DMA_CIRCULAR +Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD +Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE +Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING +Dma.ADC1.0.Priority=DMA_PRIORITY_LOW +Dma.ADC1.0.RequestNumber=1 +Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber +Dma.ADC1.0.SignalID=NONE +Dma.ADC1.0.SyncEnable=DISABLE +Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT +Dma.ADC1.0.SyncRequestNumber=1 +Dma.ADC1.0.SyncSignalID=NONE +Dma.Request0=ADC1 +Dma.RequestsNb=1 +FDCAN2.AutoRetransmission=ENABLE +FDCAN2.CalculateBaudRateNominal=1000000 +FDCAN2.CalculateTimeBitNominal=1000 +FDCAN2.CalculateTimeQuantumNominal=6.25 +FDCAN2.DataPrescaler=8 +FDCAN2.DataSyncJumpWidth=16 +FDCAN2.DataTimeSeg1=14 +FDCAN2.DataTimeSeg2=5 +FDCAN2.ExtFiltersNbr=2 +FDCAN2.FrameFormat=FDCAN_FRAME_CLASSIC +FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,FrameFormat,NominalTimeSeg1,NominalTimeSeg2,NominalPrescaler,AutoRetransmission,StdFiltersNbr,TransmitPause,NominalSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,DataPrescaler,DataSyncJumpWidth,ExtFiltersNbr,ProtocolException +FDCAN2.NominalPrescaler=1 +FDCAN2.NominalSyncJumpWidth=16 +FDCAN2.NominalTimeSeg1=119 +FDCAN2.NominalTimeSeg2=40 +FDCAN2.ProtocolException=ENABLE +FDCAN2.StdFiltersNbr=0 +FDCAN2.TransmitPause=DISABLE +File.Version=6 +GPIO.groupedBy=Group By Peripherals +I2C2.IPParameters=Timing +I2C2.Timing=0x30D29DE4 +KeepUserPlacement=false +LPUART1.BaudRate=115200 +LPUART1.IPParameters=BaudRate +Mcu.CPN=STM32G474RET6 +Mcu.Family=STM32G4 +Mcu.IP0=ADC1 +Mcu.IP1=DMA +Mcu.IP10=USART1 +Mcu.IP2=FDCAN2 +Mcu.IP3=I2C2 +Mcu.IP4=LPUART1 +Mcu.IP5=NVIC +Mcu.IP6=RCC +Mcu.IP7=SPI3 +Mcu.IP8=SYS +Mcu.IP9=TIM2 +Mcu.IPNb=11 +Mcu.Name=STM32G474R(B-C-E)Tx +Mcu.Package=LQFP64 +Mcu.Pin0=PF0-OSC_IN +Mcu.Pin1=PF1-OSC_OUT +Mcu.Pin10=PA7 +Mcu.Pin11=PC4 +Mcu.Pin12=PC5 +Mcu.Pin13=PB0 +Mcu.Pin14=PB1 +Mcu.Pin15=PB11 +Mcu.Pin16=PB12 +Mcu.Pin17=PB13 +Mcu.Pin18=PB14 +Mcu.Pin19=PB15 +Mcu.Pin2=PC1 +Mcu.Pin20=PA8 +Mcu.Pin21=PA11 +Mcu.Pin22=PA12 +Mcu.Pin23=PA13 +Mcu.Pin24=PA14 +Mcu.Pin25=PC10 +Mcu.Pin26=PC11 +Mcu.Pin27=PC12 +Mcu.Pin28=PB3 +Mcu.Pin29=PB4 +Mcu.Pin3=PC2 +Mcu.Pin30=PB5 +Mcu.Pin31=PB6 +Mcu.Pin32=PB7 +Mcu.Pin33=PB8-BOOT0 +Mcu.Pin34=PB9 +Mcu.Pin35=VP_SYS_VS_Systick +Mcu.Pin36=VP_SYS_VS_DBSignals +Mcu.Pin37=VP_TIM2_VS_ClockSourceINT +Mcu.Pin4=PC3 +Mcu.Pin5=PA0 +Mcu.Pin6=PA2 +Mcu.Pin7=PA3 +Mcu.Pin8=PA5 +Mcu.Pin9=PA6 +Mcu.PinsNb=38 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32G474RETx +MxCube.Version=6.15.0 +MxDb.Version=DB.6.0.150 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.FDCAN2_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true +NVIC.ForceEnableDMAVector=false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +PA0.Signal=S_TIM2_CH1 +PA11.Locked=true +PA11.Mode=CTS_RTS +PA11.Signal=USART1_CTS +PA12.Locked=true +PA12.Mode=CTS_RTS +PA12.Signal=USART1_RTS +PA13.Locked=true +PA13.Mode=Trace_Asynchronous_SW +PA13.Signal=SYS_JTMS-SWDIO +PA14.Locked=true +PA14.Mode=Trace_Asynchronous_SW +PA14.Signal=SYS_JTCK-SWCLK +PA2.GPIOParameters=GPIO_Speed +PA2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PA2.Locked=true +PA2.Mode=Asynchronous +PA2.Signal=LPUART1_TX +PA3.GPIOParameters=GPIO_Speed +PA3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PA3.Locked=true +PA3.Mode=Asynchronous +PA3.Signal=LPUART1_RX +PA5.GPIOParameters=GPIO_Label +PA5.GPIO_Label=BLINKY +PA5.Locked=true +PA5.Signal=GPIO_Output +PA6.GPIOParameters=GPIO_Label +PA6.GPIO_Label=IMD_SENSE +PA6.Locked=true +PA6.Signal=ADC2_IN3 +PA7.GPIOParameters=GPIO_Label +PA7.GPIO_Label=AMS_SENSE +PA7.Locked=true +PA7.Signal=ADC2_IN4 +PA8.Mode=I2C +PA8.Signal=I2C2_SDA +PB0.GPIOParameters=GPIO_Label +PB0.GPIO_Label=BRAKE_F_SIGNAL +PB0.Locked=true +PB0.Mode=IN15-Single-Ended +PB0.Signal=ADC1_IN15 +PB1.GPIOParameters=GPIO_Label +PB1.GPIO_Label=BRAKE_R_SIGNAL +PB1.Locked=true +PB1.Mode=IN12-Single-Ended +PB1.Signal=ADC1_IN12 +PB11.GPIOParameters=GPIO_Label +PB11.GPIO_Label=LED_TEST +PB11.Locked=true +PB11.Signal=GPIO_Output +PB12.GPIOParameters=GPIO_Speed,GPIO_PuPd +PB12.GPIO_PuPd=GPIO_PULLUP +PB12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PB12.Locked=true +PB12.Mode=FDCAN_Activate +PB12.Signal=FDCAN2_RX +PB13.GPIOParameters=GPIO_Speed +PB13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH +PB13.Locked=true +PB13.Mode=FDCAN_Activate +PB13.Signal=FDCAN2_TX +PB14.GPIOParameters=GPIO_Label +PB14.GPIO_Label=AUX_SIGNAL +PB14.Locked=true +PB14.Mode=IN5-Single-Ended +PB14.Signal=ADC1_IN5 +PB15.GPIOParameters=GPIO_Label +PB15.GPIO_Label=STEERING_ANGLE +PB15.Locked=true +PB15.Signal=ADC2_IN15 +PB3.Locked=true +PB3.Mode=Trace_Asynchronous_SW +PB3.Signal=SYS_JTDO-SWO +PB4.GPIOParameters=GPIO_Label +PB4.GPIO_Label=BRAKE_LIGHT +PB4.Locked=true +PB4.Signal=GPIO_Output +PB5.GPIOParameters=GPIO_Label +PB5.GPIO_Label=TSSI_G_CONTROL +PB5.Locked=true +PB5.Signal=GPIO_Output +PB6.Locked=true +PB6.Mode=Asynchronous +PB6.Signal=USART1_TX +PB7.Locked=true +PB7.Signal=UART4_CTS +PB8-BOOT0.GPIOParameters=GPIO_Label +PB8-BOOT0.GPIO_Label=AUX_CONTROL +PB8-BOOT0.Locked=true +PB8-BOOT0.Signal=GPIO_Output +PB9.GPIOParameters=GPIO_Label +PB9.GPIO_Label=SOFTWARE_OK_CONTROL +PB9.Locked=true +PB9.Signal=GPIO_Output +PC1.GPIOParameters=GPIO_Label +PC1.GPIO_Label=BSPD_SIGNAL +PC1.Locked=true +PC1.Mode=IN7-Single-Ended +PC1.Signal=ADC1_IN7 +PC10.Mode=Full_Duplex_Master +PC10.Signal=SPI3_SCK +PC11.Mode=Full_Duplex_Master +PC11.Signal=SPI3_MISO +PC12.Mode=Full_Duplex_Master +PC12.Signal=SPI3_MOSI +PC2.GPIOParameters=GPIO_Label +PC2.GPIO_Label=APPS1_SIGNAL +PC2.Locked=true +PC2.Mode=IN8-Single-Ended +PC2.Signal=ADC1_IN8 +PC3.GPIOParameters=GPIO_Label +PC3.GPIO_Label=APPS2_SIGNAL +PC3.Locked=true +PC3.Mode=IN9-Single-Ended +PC3.Signal=ADC1_IN9 +PC4.Mode=I2C +PC4.Signal=I2C2_SCL +PC5.Mode=Asynchronous +PC5.Signal=USART1_RX +PF0-OSC_IN.Locked=true +PF0-OSC_IN.Mode=HSE-External-Oscillator +PF0-OSC_IN.Signal=RCC_OSC_IN +PF1-OSC_OUT.Locked=true +PF1-OSC_OUT.Mode=HSE-External-Oscillator +PF1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=180 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerLinker=GCC +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=true +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32G474RETx +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.6.1 +ProjectManager.FreePins=true +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=G4PERTESTING.ioc +ProjectManager.ProjectName=G4PERTESTING +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=CMake +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-LL-true,4-MX_FDCAN2_Init-FDCAN2-false-HAL-true,5-MX_ADC1_Init-ADC1-false-LL-true,6-MX_LPUART1_UART_Init-LPUART1-false-LL-true,7-MX_I2C2_Init-I2C2-false-LL-true,8-MX_USART1_UART_Init-USART1-false-LL-true,9-MX_SPI3_Init-SPI3-false-LL-true,10-MX_TIM2_Init-TIM2-false-LL-true +RCC.ADC12Freq_Value=160000000 +RCC.ADC345Freq_Value=160000000 +RCC.AHBFreq_Value=160000000 +RCC.APB1Freq_Value=160000000 +RCC.APB1TimFreq_Value=160000000 +RCC.APB2Freq_Value=160000000 +RCC.APB2TimFreq_Value=160000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=160000000 +RCC.EXTERNAL_CLOCK_VALUE=12288000 +RCC.EnbaleCSS=true +RCC.FCLKCortexFreq_Value=160000000 +RCC.FDCANFreq_Value=160000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=160000000 +RCC.HRTIM1Freq_Value=160000000 +RCC.HSE_VALUE=16000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=160000000 +RCC.I2C2Freq_Value=160000000 +RCC.I2C3Freq_Value=160000000 +RCC.I2C4Freq_Value=160000000 +RCC.I2SFreq_Value=160000000 +RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,EnbaleCSS,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.LPTIM1Freq_Value=160000000 +RCC.LPUART1Freq_Value=160000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSE_VALUE=32768 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=16000000 +RCC.PLLN=20 +RCC.PLLPoutputFreq_Value=160000000 +RCC.PLLQoutputFreq_Value=160000000 +RCC.PLLRCLKFreq_Value=160000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.PWRFreq_Value=160000000 +RCC.QSPIFreq_Value=160000000 +RCC.RNGFreq_Value=160000000 +RCC.SAI1Freq_Value=160000000 +RCC.SYSCLKFreq_VALUE=160000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=160000000 +RCC.UART5Freq_Value=160000000 +RCC.USART1Freq_Value=160000000 +RCC.USART2Freq_Value=160000000 +RCC.USART3Freq_Value=160000000 +RCC.USBFreq_Value=160000000 +RCC.VCOInputFreq_Value=16000000 +RCC.VCOOutputFreq_Value=320000000 +SH.S_TIM2_CH1.0=TIM2_CH1,Forced Output1 CH1 +SH.S_TIM2_CH1.ConfNb=1 +SPI3.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32 +SPI3.CalculateBaudRate=5.0 MBits/s +SPI3.Direction=SPI_DIRECTION_2LINES +SPI3.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate +SPI3.Mode=SPI_MODE_MASTER +SPI3.VirtualType=VM_MASTER +TIM2.Channel-Forced\ Output1\ CH1=TIM_CHANNEL_1 +TIM2.IPParameters=Channel-Forced Output1 CH1 +USART1.IPParameters=VirtualMode-Asynchronous +USART1.VirtualMode-Asynchronous=VM_ASYNC +VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals +VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +board=custom diff --git a/G4NEOTESTING/README.md b/G4NEOTESTING/README.md new file mode 100644 index 000000000..099ac620f --- /dev/null +++ b/G4NEOTESTING/README.md @@ -0,0 +1,5 @@ +# STM32G474 ADC +Nucleo-G474RE-C04 + +Plug in the board following ST-LINK pinout +Compile and flash G4ADCTESTING.elf diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h new file mode 100644 index 000000000..ae34e161b --- /dev/null +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -0,0 +1,55 @@ +#include "main.h" + +#ifndef GR_NEOPIXEL_H +#define GR_NEOPIXEL_H + +#include + +typedef enum { + COLOR_GREEN = (uint32_t)0xFF0000, + COLOR_RED = (uint32_t)0x03FC00, + COLOR_BLUE = (uint32_t)0x0000FF, +} Color; + +typedef union { + struct { + Color TS_Active; + Color RTD; + }; + + uint32_t rawData[2]; +} NeoPixelData; + +void Neopixel_update(); + +#endif // GR_NEOPIXEL_H + +// make typedefs for all constants +// create initialization structs (one for GPIO, one for SPI) +// create a function to initialize SPI +// initialize spi in gr_neopixel.c + +/* + GPIO_InitStruct.Pin = LL_GPIO_PIN_12; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; + LL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; + SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV32; + SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + SPI_InitStruct.CRCPoly = 7; + LL_SPI_Init(SPI3, &SPI_InitStruct); + LL_SPI_SetStandard(SPI3, LL_SPI_PROTOCOL_MOTOROLA); + LL_SPI_EnableNSSPulseMgt(SPI3); + +*/ diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c new file mode 100644 index 000000000..bb09ff444 --- /dev/null +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -0,0 +1,24 @@ +#include "gr_neopixel.h" +#include "main.h" +#include "spi.h" +#include +#include + +void Neopixel_update() { + + NeoPixelData globalNeoPixelData = {0}; + + // temp color set + globalNeoPixelData.RTD = COLOR_BLUE; + globalNeoPixelData.TS_Active = COLOR_BLUE; + + uint8_t neopixelTransmission[48]; + for (int i = 0; i < 2; i++) { + for (int j = 23; j >= 0; j--) { + neopixelTransmission[i * 24 + 23 - j] = 0x4 + ((globalNeoPixelData.rawData[i] >> j) & 0x1 << 1); // 0x06 is high, 0x04 is low + } + } + + //might need to iterate through array and send each bit individually + LL_SPI_TransmitData8(SPI1, neopixelTransmission); +} diff --git a/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake b/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake new file mode 100644 index 000000000..dc0c569d3 --- /dev/null +++ b/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake @@ -0,0 +1,7 @@ +add_library(GR_NEOPIXEL INTERFACE) + +target_sources(GR_NEOPIXEL INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Src/gr_neopixel.c) + +target_include_directories(GR_NEOPIXEL INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Inc) + +target_link_libraries(GR_NEOPIXEL INTERFACE GLOBALSHARE_LIB) From 3f2b1f1c5c17f7b32f5f3c66816ad8d1697836d2 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Sat, 7 Feb 2026 00:55:54 +0000 Subject: [PATCH 02/31] Automatic Json Format: Standardized formatting automatically --- .vscode/launch.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index 154c89dde..55d7c5498 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -313,7 +313,7 @@ ] } }, - { + { "cwd": "${workspaceFolder}", "executable": "${command:cmake.buildDirectory}/G4NEOTESTING.elf", "name": "G4NEOTESTING", From 225384c21552bfeaf7e1a4b5207a08c274b3cdda Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Sat, 7 Feb 2026 00:56:53 +0000 Subject: [PATCH 03/31] Automatic CMake Format: Standardized formatting automatically --- Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake b/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake index dc0c569d3..59171fdd8 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake +++ b/Lib/FancyLayers-RENAME/NeoPixel/neopixel.cmake @@ -1,6 +1,10 @@ add_library(GR_NEOPIXEL INTERFACE) -target_sources(GR_NEOPIXEL INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Src/gr_neopixel.c) +target_sources( + GR_NEOPIXEL + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/Src/gr_neopixel.c +) target_include_directories(GR_NEOPIXEL INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Inc) From 250d311d961d728eb0068e1e38cec1cd30240954 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Sat, 7 Feb 2026 00:57:52 +0000 Subject: [PATCH 04/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 7 ++-- .../NeoPixel/Inc/gr_neopixel.h | 16 ++++----- .../NeoPixel/Src/gr_neopixel.c | 33 ++++++++++--------- 3 files changed, 29 insertions(+), 27 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index cabfcdff7..c6690daa4 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -23,13 +23,12 @@ #include "dma.h" #include "fdcan.h" #include "gpio.h" +#include "gr_neopixel.h" #include "i2c.h" #include "spi.h" #include "tim.h" #include "usart.h" -#include "gr_neopixel.h" - /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ @@ -121,8 +120,8 @@ int main(void) HAL_Delay(1000); /* USER CODE BEGIN 3 */ - Neopixel_update(); - } + Neopixel_update(); + } } /** diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index ae34e161b..c66048f58 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -6,18 +6,18 @@ #include typedef enum { - COLOR_GREEN = (uint32_t)0xFF0000, - COLOR_RED = (uint32_t)0x03FC00, - COLOR_BLUE = (uint32_t)0x0000FF, + COLOR_GREEN = (uint32_t)0xFF0000, + COLOR_RED = (uint32_t)0x03FC00, + COLOR_BLUE = (uint32_t)0x0000FF, } Color; typedef union { - struct { - Color TS_Active; - Color RTD; - }; + struct { + Color TS_Active; + Color RTD; + }; - uint32_t rawData[2]; + uint32_t rawData[2]; } NeoPixelData; void Neopixel_update(); diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index bb09ff444..e3f0b949e 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -1,24 +1,27 @@ #include "gr_neopixel.h" -#include "main.h" -#include "spi.h" + #include #include -void Neopixel_update() { +#include "main.h" +#include "spi.h" + +void Neopixel_update() +{ - NeoPixelData globalNeoPixelData = {0}; + NeoPixelData globalNeoPixelData = {0}; - // temp color set - globalNeoPixelData.RTD = COLOR_BLUE; - globalNeoPixelData.TS_Active = COLOR_BLUE; + // temp color set + globalNeoPixelData.RTD = COLOR_BLUE; + globalNeoPixelData.TS_Active = COLOR_BLUE; - uint8_t neopixelTransmission[48]; - for (int i = 0; i < 2; i++) { - for (int j = 23; j >= 0; j--) { - neopixelTransmission[i * 24 + 23 - j] = 0x4 + ((globalNeoPixelData.rawData[i] >> j) & 0x1 << 1); // 0x06 is high, 0x04 is low - } - } + uint8_t neopixelTransmission[48]; + for (int i = 0; i < 2; i++) { + for (int j = 23; j >= 0; j--) { + neopixelTransmission[i * 24 + 23 - j] = 0x4 + ((globalNeoPixelData.rawData[i] >> j) & 0x1 << 1); // 0x06 is high, 0x04 is low + } + } - //might need to iterate through array and send each bit individually - LL_SPI_TransmitData8(SPI1, neopixelTransmission); + // might need to iterate through array and send each bit individually + LL_SPI_TransmitData8(SPI1, neopixelTransmission); } From 91af1487713a000c1bd67a3fe496f3cf1040dcbe Mon Sep 17 00:00:00 2001 From: Cuteturtle <93956770+Cuteturtle101@users.noreply.github.com> Date: Thu, 12 Feb 2026 16:12:18 -0800 Subject: [PATCH 05/31] added spi1 --- .vscode/launch.json | 2 +- G4NEOTESTING/Core/Src/main.c | 70 ++++++++++++++++--- .../NeoPixel/Inc/gr_neopixel.h | 26 +------ .../NeoPixel/Src/gr_neopixel.c | 20 +++--- 4 files changed, 75 insertions(+), 43 deletions(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index 55d7c5498..ba127fa18 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -325,7 +325,7 @@ "target/stm32g4x.cfg" ], "searchDir": [], - "preLaunchTask": "CMake: configure and build G4CANTESTING", + "preLaunchTask": "CMake: configure and build G4NEOTESTING", "showDevDebugOutput": "raw", "svdPath": "${workspaceFolder}/Lib/Vendor/CMSIS_5/SVD/STM32G474.svd", "swoConfig": { diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index c6690daa4..d26f9e2a2 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -69,6 +69,60 @@ void SystemClock_Config(void); * @brief The application entry point. * @retval int */ + +void MX_SPI1_Init(void) +{ + + LL_SPI_InitTypeDef SPI_InitStruct = {0}; + LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; + + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI1); + + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + + //mosi + GPIO_InitStruct.Pin = LL_GPIO_PIN_5; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + //miso + GPIO_InitStruct.Pin = LL_GPIO_PIN_4; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + //sysclk + GPIO_InitStruct.Pin = LL_GPIO_PIN_3; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; + SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; + SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; + SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64; + SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + SPI_InitStruct.CRCPoly = 7; + LL_SPI_Init(SPI1, &SPI_InitStruct); + LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); + LL_SPI_EnableNSSPulseMgt(SPI1); + +} + int main(void) { @@ -96,14 +150,14 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); - MX_DMA_Init(); - MX_FDCAN2_Init(); - MX_ADC1_Init(); - MX_LPUART1_UART_Init(); - MX_I2C2_Init(); - MX_USART1_UART_Init(); - MX_SPI3_Init(); - MX_TIM2_Init(); + //MX_DMA_Init(); + //MX_FDCAN2_Init(); + //MX_ADC1_Init(); + //MX_LPUART1_UART_Init(); + //MX_I2C2_Init(); + //MX_USART1_UART_Init(); + MX_SPI1_Init(); + //MX_TIM2_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index c66048f58..c638c846a 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -22,34 +22,10 @@ typedef union { void Neopixel_update(); -#endif // GR_NEOPIXEL_H // make typedefs for all constants // create initialization structs (one for GPIO, one for SPI) // create a function to initialize SPI // initialize spi in gr_neopixel.c -/* - GPIO_InitStruct.Pin = LL_GPIO_PIN_12; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; - SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; - SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV32; - SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - SPI_InitStruct.CRCPoly = 7; - LL_SPI_Init(SPI3, &SPI_InitStruct); - LL_SPI_SetStandard(SPI3, LL_SPI_PROTOCOL_MOTOROLA); - LL_SPI_EnableNSSPulseMgt(SPI3); - -*/ +#endif // GR_NEOPIXEL_H diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index e3f0b949e..711d8d246 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -3,17 +3,14 @@ #include #include -#include "main.h" -#include "spi.h" -void Neopixel_update() -{ +void Neopixel_update() { NeoPixelData globalNeoPixelData = {0}; - // temp color set - globalNeoPixelData.RTD = COLOR_BLUE; - globalNeoPixelData.TS_Active = COLOR_BLUE; + // temp color set + globalNeoPixelData.RTD = 0x0000FF; + globalNeoPixelData.TS_Active = 0x0000FF; uint8_t neopixelTransmission[48]; for (int i = 0; i < 2; i++) { @@ -22,6 +19,11 @@ void Neopixel_update() } } - // might need to iterate through array and send each bit individually - LL_SPI_TransmitData8(SPI1, neopixelTransmission); + //HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); + + for(int i = 0; i < sizeof(neopixelTransmission); i++) + { + LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); + } + } From ea66ebcd673280b8948ab9ccd8957957462994b9 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Fri, 13 Feb 2026 04:01:38 +0000 Subject: [PATCH 06/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 21 +++++++++---------- .../NeoPixel/Inc/gr_neopixel.h | 1 - .../NeoPixel/Src/gr_neopixel.c | 20 ++++++++---------- 3 files changed, 19 insertions(+), 23 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index d26f9e2a2..294010135 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -80,7 +80,7 @@ void MX_SPI1_Init(void) LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - //mosi + // mosi GPIO_InitStruct.Pin = LL_GPIO_PIN_5; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; @@ -89,7 +89,7 @@ void MX_SPI1_Init(void) GPIO_InitStruct.Alternate = LL_GPIO_AF_5; LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - //miso + // miso GPIO_InitStruct.Pin = LL_GPIO_PIN_4; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; @@ -98,7 +98,7 @@ void MX_SPI1_Init(void) GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - //sysclk + // sysclk GPIO_InitStruct.Pin = LL_GPIO_PIN_3; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; @@ -120,7 +120,6 @@ void MX_SPI1_Init(void) LL_SPI_Init(SPI1, &SPI_InitStruct); LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(SPI1); - } int main(void) @@ -150,14 +149,14 @@ int main(void) /* Initialize all configured peripherals */ MX_GPIO_Init(); - //MX_DMA_Init(); - //MX_FDCAN2_Init(); - //MX_ADC1_Init(); - //MX_LPUART1_UART_Init(); - //MX_I2C2_Init(); - //MX_USART1_UART_Init(); + // MX_DMA_Init(); + // MX_FDCAN2_Init(); + // MX_ADC1_Init(); + // MX_LPUART1_UART_Init(); + // MX_I2C2_Init(); + // MX_USART1_UART_Init(); MX_SPI1_Init(); - //MX_TIM2_Init(); + // MX_TIM2_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index c638c846a..18c8bc8ed 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -22,7 +22,6 @@ typedef union { void Neopixel_update(); - // make typedefs for all constants // create initialization structs (one for GPIO, one for SPI) // create a function to initialize SPI diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 711d8d246..4569a50f4 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -3,14 +3,14 @@ #include #include - -void Neopixel_update() { +void Neopixel_update() +{ NeoPixelData globalNeoPixelData = {0}; - // temp color set - globalNeoPixelData.RTD = 0x0000FF; - globalNeoPixelData.TS_Active = 0x0000FF; + // temp color set + globalNeoPixelData.RTD = 0x0000FF; + globalNeoPixelData.TS_Active = 0x0000FF; uint8_t neopixelTransmission[48]; for (int i = 0; i < 2; i++) { @@ -19,11 +19,9 @@ void Neopixel_update() { } } - //HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); - - for(int i = 0; i < sizeof(neopixelTransmission); i++) - { - LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); - } + // HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); + for (int i = 0; i < sizeof(neopixelTransmission); i++) { + LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); + } } From 9b4a51dd9eaede292972b3d97eacad8a560ab4ba Mon Sep 17 00:00:00 2001 From: Cuteturtle <93956770+Cuteturtle101@users.noreply.github.com> Date: Thu, 12 Feb 2026 20:25:17 -0800 Subject: [PATCH 07/31] log being tested --- G4NEOTESTING/Core/Src/main.c | 17 ++++++++++++++++- .../NeoPixel/Src/gr_neopixel.c | 11 ++++++++--- Lib/Platform/STM32G474xE/startup_stm32g474xx.s | 1 - 3 files changed, 24 insertions(+), 5 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 294010135..386e8ea69 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -18,6 +18,7 @@ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" +#include "Logomatic.h" #include "adc.h" #include "dma.h" @@ -62,7 +63,18 @@ void SystemClock_Config(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ +/* Enable ITM for SWO output */ +static void ITM_Enable(void) +{ + /* Enable TRC (Trace) */ + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + + /* Enable stimulus port 0 */ + ITM->TER |= (1UL << 0); + /* Set trace control register */ + ITM->TCR |= ITM_TCR_ITMENA_Msk; +} /* USER CODE END 0 */ /** @@ -76,7 +88,7 @@ void MX_SPI1_Init(void) LL_SPI_InitTypeDef SPI_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI1); + LL_APB1_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); @@ -120,6 +132,7 @@ void MX_SPI1_Init(void) LL_SPI_Init(SPI1, &SPI_InitStruct); LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(SPI1); + ITM_Enable(); } int main(void) @@ -174,6 +187,8 @@ int main(void) /* USER CODE BEGIN 3 */ Neopixel_update(); + + LOGOMATIC("Hello world! \n"); } } diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 4569a50f4..4337dce1e 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -1,4 +1,5 @@ #include "gr_neopixel.h" +#include "Logomatic.h" #include #include @@ -21,7 +22,11 @@ void Neopixel_update() // HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); - for (int i = 0; i < sizeof(neopixelTransmission); i++) { - LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); - } + //int test = sizeof(neopixelTransmission)/sizeof(neopixelTransmission[0]); + + for(uint8_t i = 0; i < sizeof(neopixelTransmission); i++) + { + LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); + } + } diff --git a/Lib/Platform/STM32G474xE/startup_stm32g474xx.s b/Lib/Platform/STM32G474xE/startup_stm32g474xx.s index f862ed858..16516e321 100644 --- a/Lib/Platform/STM32G474xE/startup_stm32g474xx.s +++ b/Lib/Platform/STM32G474xE/startup_stm32g474xx.s @@ -593,4 +593,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler - From 57f36118da16c1700a566fe2059b48a06dea3af2 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Fri, 13 Feb 2026 04:32:39 +0000 Subject: [PATCH 08/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 2 +- Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c | 13 ++++++------- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 386e8ea69..74e389c81 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -18,8 +18,8 @@ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" -#include "Logomatic.h" +#include "Logomatic.h" #include "adc.h" #include "dma.h" #include "fdcan.h" diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 4337dce1e..3b10421b0 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -1,9 +1,10 @@ #include "gr_neopixel.h" -#include "Logomatic.h" #include #include +#include "Logomatic.h" + void Neopixel_update() { @@ -22,11 +23,9 @@ void Neopixel_update() // HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); - //int test = sizeof(neopixelTransmission)/sizeof(neopixelTransmission[0]); - - for(uint8_t i = 0; i < sizeof(neopixelTransmission); i++) - { - LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); - } + // int test = sizeof(neopixelTransmission)/sizeof(neopixelTransmission[0]); + for (uint8_t i = 0; i < sizeof(neopixelTransmission); i++) { + LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); + } } From f99191774215e96faecd035c282991a5b36d86a2 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Sat, 14 Feb 2026 03:02:15 -0800 Subject: [PATCH 09/31] Setup logomatic and change clock HSE -> HSI --- G4NEOTESTING/Core/Src/main.c | 67 ++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 38 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 74e389c81..257f9ad05 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -53,6 +53,19 @@ /* Private variables ---------------------------------------------------------*/ /* USER CODE BEGIN PV */ +LogomaticConfig logomaticConfig = {.clock_source = LOGOMATIC_PCLK1, + .bus = LOGOMATIC_BUS, + .gpio_port = LOGOMATIC_GPIOA, + .gpio_pin_rx_tx_mask = LL_GPIO_PIN_2 | LL_GPIO_PIN_3, + .baud_rate = 115200, + .data_width = LOGOMATIC_DATAWIDTH_8B, + .stop_bits = LOGOMATIC_STOPBITS_1, + .parity = LOGOMATIC_PARITY_NONE, + .transfer_direction = LOGOMATIC_DIRECTION_TX, + .hardware_flow_control = LOGOMATIC_HWCONTROL_NONE, + .prescaler = LOGOMATIC_PRESCALER_DIV1, + .tx_fifo_threshold = LOGOMATIC_FIFOTHRESHOLD_1_8, + .rx_fifo_threshold = LOGOMATIC_FIFOTHRESHOLD_1_8}; /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -63,18 +76,7 @@ void SystemClock_Config(void); /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ -/* Enable ITM for SWO output */ -static void ITM_Enable(void) -{ - /* Enable TRC (Trace) */ - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; - - /* Enable stimulus port 0 */ - ITM->TER |= (1UL << 0); - /* Set trace control register */ - ITM->TCR |= ITM_TCR_ITMENA_Msk; -} /* USER CODE END 0 */ /** @@ -90,7 +92,8 @@ void MX_SPI1_Init(void) LL_APB1_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); // mosi GPIO_InitStruct.Pin = LL_GPIO_PIN_5; @@ -110,14 +113,14 @@ void MX_SPI1_Init(void) GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - // sysclk - GPIO_InitStruct.Pin = LL_GPIO_PIN_3; + // sck (move off PB3/SWO to PA5) + GPIO_InitStruct.Pin = LL_GPIO_PIN_5; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + LL_GPIO_Init(GPIOA, &GPIO_InitStruct); SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; @@ -132,7 +135,6 @@ void MX_SPI1_Init(void) LL_SPI_Init(SPI1, &SPI_InitStruct); LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(SPI1); - ITM_Enable(); } int main(void) @@ -150,26 +152,20 @@ int main(void) HAL_Init(); /* USER CODE BEGIN Init */ - + Setup_Logomatic(&logomaticConfig); /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ - + LL_mDelay(1000); // Wait for peripherals to stabilize + LOGOMATIC("Booted!\n"); /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - // MX_DMA_Init(); - // MX_FDCAN2_Init(); - // MX_ADC1_Init(); - // MX_LPUART1_UART_Init(); - // MX_I2C2_Init(); - // MX_USART1_UART_Init(); MX_SPI1_Init(); - // MX_TIM2_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -179,13 +175,8 @@ int main(void) while (1) { /* USER CODE END WHILE */ - // BLINKY - HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET); - HAL_Delay(1000); - HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET); - HAL_Delay(1000); - /* USER CODE BEGIN 3 */ + LL_mDelay(500); Neopixel_update(); LOGOMATIC("Hello world! \n"); @@ -201,12 +192,12 @@ void SystemClock_Config(void) LL_FLASH_SetLatency(LL_FLASH_LATENCY_4); while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_4) {} LL_PWR_EnableRange1BoostMode(); - LL_RCC_HSE_Enable(); - /* Wait till HSE is ready */ - while (LL_RCC_HSE_IsReady() != 1) {} + LL_RCC_HSI_Enable(); + /* Wait till HSI is ready */ + while (LL_RCC_HSI_IsReady() != 1) {} - LL_RCC_HSE_EnableCSS(); - LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_1, 20, LL_RCC_PLLR_DIV_2); + LL_RCC_HSI_SetCalibTrimming(64); + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI, LL_RCC_PLLM_DIV_4, 85, LL_RCC_PLLR_DIV_2); LL_RCC_PLL_EnableDomain_SYS(); LL_RCC_PLL_Enable(); /* Wait till PLL is ready */ @@ -225,7 +216,7 @@ void SystemClock_Config(void) LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1); LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); - LL_SetSystemCoreClock(160000000); + LL_SetSystemCoreClock(170000000); /* Update the time base */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) { From fcd526000fec384eaadbdf96bb95d544df56c149 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Sat, 14 Feb 2026 03:02:24 -0800 Subject: [PATCH 10/31] Change clock in launch settings --- .vscode/launch.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.vscode/launch.json b/.vscode/launch.json index ba127fa18..e2152be16 100644 --- a/.vscode/launch.json +++ b/.vscode/launch.json @@ -330,7 +330,7 @@ "svdPath": "${workspaceFolder}/Lib/Vendor/CMSIS_5/SVD/STM32G474.svd", "swoConfig": { "enabled": true, - "cpuFrequency": 160000000, + "cpuFrequency": 170000000, "swoFrequency": 2000000, "source": "probe", "decoders": [ From 390d09d8dff80b6dec5d7f4d29302746a1fb1f51 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Sat, 14 Feb 2026 03:02:31 -0800 Subject: [PATCH 11/31] Cleanup usart files --- G4NEOTESTING/CMakeLists.txt | 1 - G4NEOTESTING/Core/Src/usart.c | 184 ---------------------------------- G4PERTESTING/Core/Inc/usart.h | 50 --------- 3 files changed, 235 deletions(-) delete mode 100644 G4NEOTESTING/Core/Src/usart.c delete mode 100644 G4PERTESTING/Core/Inc/usart.h diff --git a/G4NEOTESTING/CMakeLists.txt b/G4NEOTESTING/CMakeLists.txt index 4370527c9..61da21fa7 100644 --- a/G4NEOTESTING/CMakeLists.txt +++ b/G4NEOTESTING/CMakeLists.txt @@ -43,7 +43,6 @@ target_sources( Core/Src/sysmem.c Core/Src/system_stm32g4xx.c Core/Src/tim.c - Core/Src/usart.c ) target_link_libraries(${PROJECT_NAME}_USER_CODE INTERFACE GR_NEOPIXEL) diff --git a/G4NEOTESTING/Core/Src/usart.c b/G4NEOTESTING/Core/Src/usart.c deleted file mode 100644 index 56a3fa98f..000000000 --- a/G4NEOTESTING/Core/Src/usart.c +++ /dev/null @@ -1,184 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.c - * @brief This file provides code for the configuration - * of the USART instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "usart.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* LPUART1 init function */ - -void MX_LPUART1_UART_Init(void) -{ - - /* USER CODE BEGIN LPUART1_Init 0 */ - - /* USER CODE END LPUART1_Init 0 */ - - LL_LPUART_InitTypeDef LPUART_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - LL_RCC_SetLPUARTClockSource(LL_RCC_LPUART1_CLKSOURCE_PCLK1); - - /* Peripheral clock enable */ - LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); - /**LPUART1 GPIO Configuration - PA2 ------> LPUART1_TX - PA3 ------> LPUART1_RX - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_2; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_12; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_3; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_12; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN LPUART1_Init 1 */ - - /* USER CODE END LPUART1_Init 1 */ - LPUART_InitStruct.PrescalerValue = LL_LPUART_PRESCALER_DIV1; - LPUART_InitStruct.BaudRate = 115200; - LPUART_InitStruct.DataWidth = LL_LPUART_DATAWIDTH_8B; - LPUART_InitStruct.StopBits = LL_LPUART_STOPBITS_1; - LPUART_InitStruct.Parity = LL_LPUART_PARITY_NONE; - LPUART_InitStruct.TransferDirection = LL_LPUART_DIRECTION_TX_RX; - LPUART_InitStruct.HardwareFlowControl = LL_LPUART_HWCONTROL_NONE; - LL_LPUART_Init(LPUART1, &LPUART_InitStruct); - LL_LPUART_SetTXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); - LL_LPUART_SetRXFIFOThreshold(LPUART1, LL_LPUART_FIFOTHRESHOLD_1_8); - LL_LPUART_DisableFIFO(LPUART1); - - /* USER CODE BEGIN WKUPType LPUART1 */ - - /* USER CODE END WKUPType LPUART1 */ - - LL_LPUART_Enable(LPUART1); - - /* Polling LPUART1 initialisation */ - while ((!(LL_LPUART_IsActiveFlag_TEACK(LPUART1))) || (!(LL_LPUART_IsActiveFlag_REACK(LPUART1)))) {} - /* USER CODE BEGIN LPUART1_Init 2 */ - - /* USER CODE END LPUART1_Init 2 */ -} -/* USART1 init function */ - -void MX_USART1_UART_Init(void) -{ - - /* USER CODE BEGIN USART1_Init 0 */ - - /* USER CODE END USART1_Init 0 */ - - LL_USART_InitTypeDef USART_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2); - - /* Peripheral clock enable */ - LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); - /**USART1 GPIO Configuration - PC5 ------> USART1_RX - PA11 ------> USART1_CTS - PA12 ------> USART1_RTS - PB6 ------> USART1_TX - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_5; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_11; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_12; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_6; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* USER CODE BEGIN USART1_Init 1 */ - - /* USER CODE END USART1_Init 1 */ - USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1; - USART_InitStruct.BaudRate = 115200; - USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - USART_InitStruct.Parity = LL_USART_PARITY_NONE; - USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_RTS_CTS; - USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - LL_USART_Init(USART1, &USART_InitStruct); - LL_USART_SetTXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8); - LL_USART_SetRXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8); - LL_USART_DisableFIFO(USART1); - LL_USART_ConfigAsyncMode(USART1); - - /* USER CODE BEGIN WKUPType USART1 */ - - /* USER CODE END WKUPType USART1 */ - - LL_USART_Enable(USART1); - - /* Polling USART1 initialisation */ - while ((!(LL_USART_IsActiveFlag_TEACK(USART1))) || (!(LL_USART_IsActiveFlag_REACK(USART1)))) {} - /* USER CODE BEGIN USART1_Init 2 */ - - /* USER CODE END USART1_Init 2 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4PERTESTING/Core/Inc/usart.h b/G4PERTESTING/Core/Inc/usart.h deleted file mode 100644 index daefd73e6..000000000 --- a/G4PERTESTING/Core/Inc/usart.h +++ /dev/null @@ -1,50 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.h - * @brief This file contains all the function prototypes for - * the usart.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USART_H__ -#define __USART_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_LPUART1_UART_Init(void); -void MX_USART1_UART_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USART_H__ */ From 013a5205c0e8e72bd29f0478454a333b07a550ed Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Sat, 14 Feb 2026 11:03:38 +0000 Subject: [PATCH 12/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 257f9ad05..3ad526780 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -160,7 +160,7 @@ int main(void) /* USER CODE BEGIN SysInit */ LL_mDelay(1000); // Wait for peripherals to stabilize - LOGOMATIC("Booted!\n"); + LOGOMATIC("Booted!\n"); /* USER CODE END SysInit */ /* Initialize all configured peripherals */ From 59ce3595ca9a321528ecf784dc2304eb34727031 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 00:12:35 -0800 Subject: [PATCH 13/31] Do a full cleanup of other things going on in G4NEOTESTING that are not required --- CMakeLists.txt | 24 +- G4NEOTESTING/CMakeLists.txt | 7 - G4NEOTESTING/Core/Inc/adc.h | 49 ---- G4NEOTESTING/Core/Inc/crc.h | 51 ---- G4NEOTESTING/Core/Inc/dma.h | 51 ---- G4NEOTESTING/Core/Inc/fdcan.h | 51 ---- G4NEOTESTING/Core/Inc/gpio.h | 48 ---- G4NEOTESTING/Core/Inc/i2c.h | 49 ---- G4NEOTESTING/Core/Inc/tim.h | 49 ---- G4NEOTESTING/Core/Inc/usart.h | 50 ---- G4NEOTESTING/Core/Src/adc.c | 186 ------------- G4NEOTESTING/Core/Src/crc.c | 86 ------ G4NEOTESTING/Core/Src/dma.c | 50 ---- G4NEOTESTING/Core/Src/fdcan.c | 133 ---------- G4NEOTESTING/Core/Src/gpio.c | 260 ------------------ G4NEOTESTING/Core/Src/i2c.c | 92 ------- G4NEOTESTING/Core/Src/main.c | 8 - G4NEOTESTING/Core/Src/stm32g4xx_it.c | 16 +- G4NEOTESTING/Core/Src/tim.c | 79 ------ G4NEOTESTING/G4PERTESTING.ioc | 382 --------------------------- 20 files changed, 13 insertions(+), 1708 deletions(-) delete mode 100644 G4NEOTESTING/Core/Inc/adc.h delete mode 100644 G4NEOTESTING/Core/Inc/crc.h delete mode 100644 G4NEOTESTING/Core/Inc/dma.h delete mode 100644 G4NEOTESTING/Core/Inc/fdcan.h delete mode 100644 G4NEOTESTING/Core/Inc/gpio.h delete mode 100644 G4NEOTESTING/Core/Inc/i2c.h delete mode 100644 G4NEOTESTING/Core/Inc/tim.h delete mode 100644 G4NEOTESTING/Core/Inc/usart.h delete mode 100644 G4NEOTESTING/Core/Src/adc.c delete mode 100644 G4NEOTESTING/Core/Src/crc.c delete mode 100644 G4NEOTESTING/Core/Src/dma.c delete mode 100644 G4NEOTESTING/Core/Src/fdcan.c delete mode 100644 G4NEOTESTING/Core/Src/gpio.c delete mode 100644 G4NEOTESTING/Core/Src/i2c.c delete mode 100644 G4NEOTESTING/Core/Src/tim.c delete mode 100644 G4NEOTESTING/G4PERTESTING.ioc diff --git a/CMakeLists.txt b/CMakeLists.txt index 3acf958d9..80862ab6d 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -64,22 +64,22 @@ message( ) # Projects -#add_gr_project(STM32G474xE ECU) -#add_gr_project(STM32G474xE CCU) -#add_gr_project(STM32G474xE AnalogCalibration) +add_gr_project(STM32G474xE ECU) +add_gr_project(STM32G474xE CCU) +add_gr_project(STM32G474xE AnalogCalibration) # Development -#add_gr_project(STM32G474xE G4ADCTESTING) -#add_gr_project(STM32G474xE G4PERTESTING) -#add_gr_project(STM32G474xE G4CANTESTING) +add_gr_project(STM32G474xE G4ADCTESTING) +add_gr_project(STM32G474xE G4PERTESTING) +add_gr_project(STM32G474xE G4CANTESTING) add_gr_project(STM32G474xE G4NEOTESTING) # BLINKY Demos -#add_gr_project(STM32G474xE BLINKY G4HELLO) -#add_gr_project(STM32G474xE BLINKY G4BLINKY) -#add_gr_project(STM32U5A9xJ BLINKY U5BLINKY) -#add_gr_project(STM32L476xG BLINKY L4BLINKY) +add_gr_project(STM32G474xE BLINKY G4HELLO) +add_gr_project(STM32G474xE BLINKY G4BLINKY) +add_gr_project(STM32U5A9xJ BLINKY U5BLINKY) +add_gr_project(STM32L476xG BLINKY L4BLINKY) # Onboarding Workshops -#add_gr_project(STM32G474xE Onboarding W3_G4SPI_Receive) -#add_gr_project(STM32G474xE Onboarding W3_G4SPI_Transmit) +add_gr_project(STM32G474xE Onboarding W3_G4SPI_Receive) +add_gr_project(STM32G474xE Onboarding W3_G4SPI_Transmit) diff --git a/G4NEOTESTING/CMakeLists.txt b/G4NEOTESTING/CMakeLists.txt index 61da21fa7..057299075 100644 --- a/G4NEOTESTING/CMakeLists.txt +++ b/G4NEOTESTING/CMakeLists.txt @@ -29,12 +29,6 @@ add_library(${PROJECT_NAME}_USER_CODE INTERFACE) target_sources( ${PROJECT_NAME}_USER_CODE INTERFACE - Core/Src/adc.c - Core/Src/crc.c - Core/Src/dma.c - Core/Src/fdcan.c - Core/Src/gpio.c - Core/Src/i2c.c Core/Src/main.c Core/Src/spi.c Core/Src/stm32g4xx_hal_msp.c @@ -42,7 +36,6 @@ target_sources( Core/Src/syscalls.c Core/Src/sysmem.c Core/Src/system_stm32g4xx.c - Core/Src/tim.c ) target_link_libraries(${PROJECT_NAME}_USER_CODE INTERFACE GR_NEOPIXEL) diff --git a/G4NEOTESTING/Core/Inc/adc.h b/G4NEOTESTING/Core/Inc/adc.h deleted file mode 100644 index 41154538b..000000000 --- a/G4NEOTESTING/Core/Inc/adc.h +++ /dev/null @@ -1,49 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file adc.h - * @brief This file contains all the function prototypes for - * the adc.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __ADC_H__ -#define __ADC_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_ADC1_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __ADC_H__ */ diff --git a/G4NEOTESTING/Core/Inc/crc.h b/G4NEOTESTING/Core/Inc/crc.h deleted file mode 100644 index 133957e92..000000000 --- a/G4NEOTESTING/Core/Inc/crc.h +++ /dev/null @@ -1,51 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file crc.h - * @brief This file contains all the function prototypes for - * the crc.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __CRC_H__ -#define __CRC_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -extern CRC_HandleTypeDef hcrc; - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_CRC_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __CRC_H__ */ diff --git a/G4NEOTESTING/Core/Inc/dma.h b/G4NEOTESTING/Core/Inc/dma.h deleted file mode 100644 index ae819cab4..000000000 --- a/G4NEOTESTING/Core/Inc/dma.h +++ /dev/null @@ -1,51 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file dma.h - * @brief This file contains all the function prototypes for - * the dma.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __DMA_H__ -#define __DMA_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* DMA memory to memory transfer handles -------------------------------------*/ - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_DMA_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __DMA_H__ */ diff --git a/G4NEOTESTING/Core/Inc/fdcan.h b/G4NEOTESTING/Core/Inc/fdcan.h deleted file mode 100644 index 56c4a8adb..000000000 --- a/G4NEOTESTING/Core/Inc/fdcan.h +++ /dev/null @@ -1,51 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file fdcan.h - * @brief This file contains all the function prototypes for - * the fdcan.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __FDCAN_H__ -#define __FDCAN_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -extern FDCAN_HandleTypeDef hfdcan2; - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_FDCAN2_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __FDCAN_H__ */ diff --git a/G4NEOTESTING/Core/Inc/gpio.h b/G4NEOTESTING/Core/Inc/gpio.h deleted file mode 100644 index 843d4e9e7..000000000 --- a/G4NEOTESTING/Core/Inc/gpio.h +++ /dev/null @@ -1,48 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file gpio.h - * @brief This file contains all the function prototypes for - * the gpio.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __GPIO_H__ -#define __GPIO_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_GPIO_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif -#endif /*__ GPIO_H__ */ diff --git a/G4NEOTESTING/Core/Inc/i2c.h b/G4NEOTESTING/Core/Inc/i2c.h deleted file mode 100644 index 0a0a50803..000000000 --- a/G4NEOTESTING/Core/Inc/i2c.h +++ /dev/null @@ -1,49 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file i2c.h - * @brief This file contains all the function prototypes for - * the i2c.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __I2C_H__ -#define __I2C_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_I2C2_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __I2C_H__ */ diff --git a/G4NEOTESTING/Core/Inc/tim.h b/G4NEOTESTING/Core/Inc/tim.h deleted file mode 100644 index c19e6cc71..000000000 --- a/G4NEOTESTING/Core/Inc/tim.h +++ /dev/null @@ -1,49 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file tim.h - * @brief This file contains all the function prototypes for - * the tim.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __TIM_H__ -#define __TIM_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_TIM2_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __TIM_H__ */ diff --git a/G4NEOTESTING/Core/Inc/usart.h b/G4NEOTESTING/Core/Inc/usart.h deleted file mode 100644 index daefd73e6..000000000 --- a/G4NEOTESTING/Core/Inc/usart.h +++ /dev/null @@ -1,50 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.h - * @brief This file contains all the function prototypes for - * the usart.c file - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USART_H__ -#define __USART_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "main.h" - -/* USER CODE BEGIN Includes */ - -/* USER CODE END Includes */ - -/* USER CODE BEGIN Private defines */ - -/* USER CODE END Private defines */ - -void MX_LPUART1_UART_Init(void); -void MX_USART1_UART_Init(void); - -/* USER CODE BEGIN Prototypes */ - -/* USER CODE END Prototypes */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USART_H__ */ diff --git a/G4NEOTESTING/Core/Src/adc.c b/G4NEOTESTING/Core/Src/adc.c deleted file mode 100644 index f3dbff8ed..000000000 --- a/G4NEOTESTING/Core/Src/adc.c +++ /dev/null @@ -1,186 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file adc.c - * @brief This file provides code for the configuration - * of the ADC instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "adc.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* ADC1 init function */ -void MX_ADC1_Init(void) -{ - - /* USER CODE BEGIN ADC1_Init 0 */ - - /* USER CODE END ADC1_Init 0 */ - - LL_ADC_InitTypeDef ADC_InitStruct = {0}; - LL_ADC_REG_InitTypeDef ADC_REG_InitStruct = {0}; - LL_ADC_CommonInitTypeDef ADC_CommonInitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - LL_RCC_SetADCClockSource(LL_RCC_ADC12_CLKSOURCE_SYSCLK); - - /* Peripheral clock enable */ - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC12); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); - /**ADC1 GPIO Configuration - PC1 ------> ADC1_IN7 - PC2 ------> ADC1_IN8 - PC3 ------> ADC1_IN9 - PB0 ------> ADC1_IN15 - PB1 ------> ADC1_IN12 - PB14 ------> ADC1_IN5 - */ - GPIO_InitStruct.Pin = BSPD_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(BSPD_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = APPS1_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(APPS1_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = APPS2_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(APPS2_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = BRAKE_F_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(BRAKE_F_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = BRAKE_R_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(BRAKE_R_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = AUX_SIGNAL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(AUX_SIGNAL_GPIO_Port, &GPIO_InitStruct); - - /* ADC1 DMA Init */ - - /* ADC1 Init */ - LL_DMA_SetPeriphRequest(DMA1, LL_DMA_CHANNEL_1, LL_DMAMUX_REQ_ADC1); - - LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_PERIPH_TO_MEMORY); - - LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_LOW); - - LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_CIRCULAR); - - LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_NOINCREMENT); - - LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT); - - LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_HALFWORD); - - LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_HALFWORD); - - /* USER CODE BEGIN ADC1_Init 1 */ - - /* USER CODE END ADC1_Init 1 */ - - /** Common config - */ - ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B; - ADC_InitStruct.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT; - ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE; - LL_ADC_Init(ADC1, &ADC_InitStruct); - ADC_REG_InitStruct.TriggerSource = LL_ADC_REG_TRIG_SOFTWARE; - ADC_REG_InitStruct.SequencerLength = LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS; - ADC_REG_InitStruct.SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE; - ADC_REG_InitStruct.ContinuousMode = LL_ADC_REG_CONV_CONTINUOUS; - ADC_REG_InitStruct.DMATransfer = LL_ADC_REG_DMA_TRANSFER_UNLIMITED; - ADC_REG_InitStruct.Overrun = LL_ADC_REG_OVR_DATA_PRESERVED; - LL_ADC_REG_Init(ADC1, &ADC_REG_InitStruct); - LL_ADC_SetGainCompensation(ADC1, 0); - LL_ADC_SetOverSamplingScope(ADC1, LL_ADC_OVS_DISABLE); - ADC_CommonInitStruct.CommonClock = LL_ADC_CLOCK_ASYNC_DIV256; - ADC_CommonInitStruct.Multimode = LL_ADC_MULTI_INDEPENDENT; - LL_ADC_CommonInit(__LL_ADC_COMMON_INSTANCE(ADC1), &ADC_CommonInitStruct); - - /* Disable ADC deep power down (enabled by default after reset state) */ - LL_ADC_DisableDeepPowerDown(ADC1); - /* Enable ADC internal voltage regulator */ - LL_ADC_EnableInternalRegulator(ADC1); - /* Delay for ADC internal voltage regulator stabilization. */ - /* Compute number of CPU cycles to wait for, from delay in us. */ - /* Note: Variable divided by 2 to compensate partially */ - /* CPU processing cycles (depends on compilation optimization). */ - /* Note: If system core clock frequency is below 200kHz, wait time */ - /* is only a few CPU processing cycles. */ - uint32_t wait_loop_index; - wait_loop_index = ((LL_ADC_DELAY_INTERNAL_REGUL_STAB_US * (SystemCoreClock / (100000 * 2))) / 10); - while (wait_loop_index != 0) { - wait_loop_index--; - } - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_5); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_5, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_5, LL_ADC_SINGLE_ENDED); - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_2, LL_ADC_CHANNEL_7); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_7, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_7, LL_ADC_SINGLE_ENDED); - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_3, LL_ADC_CHANNEL_8); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_8, LL_ADC_SINGLE_ENDED); - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_4, LL_ADC_CHANNEL_9); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_9, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_9, LL_ADC_SINGLE_ENDED); - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_5, LL_ADC_CHANNEL_12); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_12, LL_ADC_SINGLE_ENDED); - - /** Configure Regular Channel - */ - LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_6, LL_ADC_CHANNEL_15); - LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_15, LL_ADC_SAMPLINGTIME_92CYCLES_5); - LL_ADC_SetChannelSingleDiff(ADC1, LL_ADC_CHANNEL_15, LL_ADC_SINGLE_ENDED); - /* USER CODE BEGIN ADC1_Init 2 */ - - /* USER CODE END ADC1_Init 2 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/crc.c b/G4NEOTESTING/Core/Src/crc.c deleted file mode 100644 index 213510a5d..000000000 --- a/G4NEOTESTING/Core/Src/crc.c +++ /dev/null @@ -1,86 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file crc.c - * @brief This file provides code for the configuration - * of the CRC instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "crc.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -CRC_HandleTypeDef hcrc; - -/* CRC init function */ -void MX_CRC_Init(void) -{ - - /* USER CODE BEGIN CRC_Init 0 */ - - /* USER CODE END CRC_Init 0 */ - - /* USER CODE BEGIN CRC_Init 1 */ - - /* USER CODE END CRC_Init 1 */ - hcrc.Instance = CRC; - hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; - hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; - hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE; - hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE; - hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; - if (HAL_CRC_Init(&hcrc) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN CRC_Init 2 */ - - /* USER CODE END CRC_Init 2 */ -} - -void HAL_CRC_MspInit(CRC_HandleTypeDef *crcHandle) -{ - - if (crcHandle->Instance == CRC) { - /* USER CODE BEGIN CRC_MspInit 0 */ - - /* USER CODE END CRC_MspInit 0 */ - /* CRC clock enable */ - __HAL_RCC_CRC_CLK_ENABLE(); - /* USER CODE BEGIN CRC_MspInit 1 */ - - /* USER CODE END CRC_MspInit 1 */ - } -} - -void HAL_CRC_MspDeInit(CRC_HandleTypeDef *crcHandle) -{ - - if (crcHandle->Instance == CRC) { - /* USER CODE BEGIN CRC_MspDeInit 0 */ - - /* USER CODE END CRC_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_CRC_CLK_DISABLE(); - /* USER CODE BEGIN CRC_MspDeInit 1 */ - - /* USER CODE END CRC_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/dma.c b/G4NEOTESTING/Core/Src/dma.c deleted file mode 100644 index 491e3889d..000000000 --- a/G4NEOTESTING/Core/Src/dma.c +++ /dev/null @@ -1,50 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file dma.c - * @brief This file provides code for the configuration - * of all the requested memory to memory DMA transfers. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Includes ------------------------------------------------------------------*/ -#include "dma.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/*----------------------------------------------------------------------------*/ -/* Configure DMA */ -/*----------------------------------------------------------------------------*/ - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** - * Enable DMA controller clock - */ -void MX_DMA_Init(void) -{ - - /* Init with LL driver */ - /* DMA controller clock enable */ - LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1); - LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1); -} - -/* USER CODE BEGIN 2 */ - -/* USER CODE END 2 */ diff --git a/G4NEOTESTING/Core/Src/fdcan.c b/G4NEOTESTING/Core/Src/fdcan.c deleted file mode 100644 index f39dbfa2b..000000000 --- a/G4NEOTESTING/Core/Src/fdcan.c +++ /dev/null @@ -1,133 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file fdcan.c - * @brief This file provides code for the configuration - * of the FDCAN instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "fdcan.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -FDCAN_HandleTypeDef hfdcan2; - -/* FDCAN2 init function */ -void MX_FDCAN2_Init(void) -{ - - /* USER CODE BEGIN FDCAN2_Init 0 */ - - /* USER CODE END FDCAN2_Init 0 */ - - /* USER CODE BEGIN FDCAN2_Init 1 */ - - /* USER CODE END FDCAN2_Init 1 */ - hfdcan2.Instance = FDCAN2; - hfdcan2.Init.ClockDivider = FDCAN_CLOCK_DIV1; - hfdcan2.Init.FrameFormat = FDCAN_FRAME_CLASSIC; - hfdcan2.Init.Mode = FDCAN_MODE_NORMAL; - hfdcan2.Init.AutoRetransmission = ENABLE; - hfdcan2.Init.TransmitPause = DISABLE; - hfdcan2.Init.ProtocolException = ENABLE; - hfdcan2.Init.NominalPrescaler = 1; - hfdcan2.Init.NominalSyncJumpWidth = 16; - hfdcan2.Init.NominalTimeSeg1 = 119; - hfdcan2.Init.NominalTimeSeg2 = 40; - hfdcan2.Init.DataPrescaler = 8; - hfdcan2.Init.DataSyncJumpWidth = 16; - hfdcan2.Init.DataTimeSeg1 = 14; - hfdcan2.Init.DataTimeSeg2 = 5; - hfdcan2.Init.StdFiltersNbr = 0; - hfdcan2.Init.ExtFiltersNbr = 2; - hfdcan2.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION; - if (HAL_FDCAN_Init(&hfdcan2) != HAL_OK) { - Error_Handler(); - } - /* USER CODE BEGIN FDCAN2_Init 2 */ - - /* USER CODE END FDCAN2_Init 2 */ -} - -void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef *fdcanHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - if (fdcanHandle->Instance == FDCAN2) { - /* USER CODE BEGIN FDCAN2_MspInit 0 */ - - /* USER CODE END FDCAN2_MspInit 0 */ - LL_RCC_SetFDCANClockSource(LL_RCC_FDCAN_CLKSOURCE_PCLK1); - - /* FDCAN2 clock enable */ - __HAL_RCC_FDCAN_CLK_ENABLE(); - - __HAL_RCC_GPIOB_CLK_ENABLE(); - /**FDCAN2 GPIO Configuration - PB12 ------> FDCAN2_RX - PB13 ------> FDCAN2_TX - */ - GPIO_InitStruct.Pin = GPIO_PIN_12; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_PULLUP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = GPIO_PIN_13; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF9_FDCAN2; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* FDCAN2 interrupt Init */ - HAL_NVIC_SetPriority(FDCAN2_IT0_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(FDCAN2_IT0_IRQn); - /* USER CODE BEGIN FDCAN2_MspInit 1 */ - - /* USER CODE END FDCAN2_MspInit 1 */ - } -} - -void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef *fdcanHandle) -{ - - if (fdcanHandle->Instance == FDCAN2) { - /* USER CODE BEGIN FDCAN2_MspDeInit 0 */ - - /* USER CODE END FDCAN2_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_FDCAN_CLK_DISABLE(); - - /**FDCAN2 GPIO Configuration - PB12 ------> FDCAN2_RX - PB13 ------> FDCAN2_TX - */ - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12 | GPIO_PIN_13); - - /* FDCAN2 interrupt Deinit */ - HAL_NVIC_DisableIRQ(FDCAN2_IT0_IRQn); - /* USER CODE BEGIN FDCAN2_MspDeInit 1 */ - - /* USER CODE END FDCAN2_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/gpio.c b/G4NEOTESTING/Core/Src/gpio.c deleted file mode 100644 index d36e6eca6..000000000 --- a/G4NEOTESTING/Core/Src/gpio.c +++ /dev/null @@ -1,260 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file gpio.c - * @brief This file provides code for the configuration - * of all used GPIO pins. - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ - -/* Includes ------------------------------------------------------------------*/ -#include "gpio.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/*----------------------------------------------------------------------------*/ -/* Configure GPIO */ -/*----------------------------------------------------------------------------*/ -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ - -/** Configure pins as - * Analog - * Input - * Output - * EVENT_OUT - * EXTI - * Free pins are configured automatically as Analog (this feature is - enabled through - * the Code Generation settings) - PA6 ------> ADC2_IN3 - PA7 ------> ADC2_IN4 - PB15 ------> ADC2_IN15 - PB7 ------> UART4_CTS -*/ -void MX_GPIO_Init(void) -{ - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - /* GPIO Ports Clock Enable */ - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOF); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOG); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD); - - /**/ - LL_GPIO_ResetOutputPin(BLINKY_GPIO_Port, BLINKY_Pin); - - /**/ - LL_GPIO_ResetOutputPin(LED_TEST_GPIO_Port, LED_TEST_Pin); - - /**/ - LL_GPIO_ResetOutputPin(BRAKE_LIGHT_GPIO_Port, BRAKE_LIGHT_Pin); - - /**/ - LL_GPIO_ResetOutputPin(TSSI_G_CONTROL_GPIO_Port, TSSI_G_CONTROL_Pin); - - /**/ - LL_GPIO_ResetOutputPin(AUX_CONTROL_GPIO_Port, AUX_CONTROL_Pin); - - /**/ - LL_GPIO_ResetOutputPin(SOFTWARE_OK_CONTROL_GPIO_Port, SOFTWARE_OK_CONTROL_Pin); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_13; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_14; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_15; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_10; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOG, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_0; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_1; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_4; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = BLINKY_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(BLINKY_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = IMD_SENSE_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(IMD_SENSE_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = AMS_SENSE_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(AMS_SENSE_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_2; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_10; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LED_TEST_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(LED_TEST_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = STEERING_ANGLE_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(STEERING_ANGLE_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_6; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_7; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_8; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_9; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_9; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_10; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_15; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_2; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ANALOG; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(GPIOD, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = BRAKE_LIGHT_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(BRAKE_LIGHT_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = TSSI_G_CONTROL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(TSSI_G_CONTROL_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = LL_GPIO_PIN_7; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_14; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = AUX_CONTROL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(AUX_CONTROL_GPIO_Port, &GPIO_InitStruct); - - /**/ - GPIO_InitStruct.Pin = SOFTWARE_OK_CONTROL_Pin; - GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - LL_GPIO_Init(SOFTWARE_OK_CONTROL_GPIO_Port, &GPIO_InitStruct); -} - -/* USER CODE BEGIN 2 */ - -/* USER CODE END 2 */ diff --git a/G4NEOTESTING/Core/Src/i2c.c b/G4NEOTESTING/Core/Src/i2c.c deleted file mode 100644 index bfb4e0153..000000000 --- a/G4NEOTESTING/Core/Src/i2c.c +++ /dev/null @@ -1,92 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file i2c.c - * @brief This file provides code for the configuration - * of the I2C instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "i2c.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* I2C2 init function */ -void MX_I2C2_Init(void) -{ - - /* USER CODE BEGIN I2C2_Init 0 */ - - /* USER CODE END I2C2_Init 0 */ - - LL_I2C_InitTypeDef I2C_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - LL_RCC_SetI2CClockSource(LL_RCC_I2C2_CLKSOURCE_PCLK1); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); - /**I2C2 GPIO Configuration - PC4 ------> I2C2_SCL - PA8 ------> I2C2_SDA - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_4; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_4; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_8; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_4; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* Peripheral clock enable */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2); - - /* USER CODE BEGIN I2C2_Init 1 */ - - /* USER CODE END I2C2_Init 1 */ - - /** I2C Initialization - */ - I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; - I2C_InitStruct.Timing = 0x30D29DE4; - I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE; - I2C_InitStruct.DigitalFilter = 0; - I2C_InitStruct.OwnAddress1 = 0; - I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; - I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; - LL_I2C_Init(I2C2, &I2C_InitStruct); - LL_I2C_EnableAutoEndMode(I2C2); - LL_I2C_SetOwnAddress2(I2C2, 0, LL_I2C_OWNADDRESS2_NOMASK); - LL_I2C_DisableOwnAddress2(I2C2); - LL_I2C_DisableGeneralCall(I2C2); - LL_I2C_EnableClockStretching(I2C2); - /* USER CODE BEGIN I2C2_Init 2 */ - - /* USER CODE END I2C2_Init 2 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 3ad526780..a3fb2ad39 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -20,15 +20,8 @@ #include "main.h" #include "Logomatic.h" -#include "adc.h" -#include "dma.h" -#include "fdcan.h" -#include "gpio.h" #include "gr_neopixel.h" -#include "i2c.h" #include "spi.h" -#include "tim.h" -#include "usart.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ @@ -164,7 +157,6 @@ int main(void) /* USER CODE END SysInit */ /* Initialize all configured peripherals */ - MX_GPIO_Init(); MX_SPI1_Init(); /* USER CODE BEGIN 2 */ diff --git a/G4NEOTESTING/Core/Src/stm32g4xx_it.c b/G4NEOTESTING/Core/Src/stm32g4xx_it.c index 2f0cf90a7..9549141b0 100644 --- a/G4NEOTESTING/Core/Src/stm32g4xx_it.c +++ b/G4NEOTESTING/Core/Src/stm32g4xx_it.c @@ -56,7 +56,7 @@ /* USER CODE END 0 */ /* External variables --------------------------------------------------------*/ -extern FDCAN_HandleTypeDef hfdcan2; + /* USER CODE BEGIN EV */ /* USER CODE END EV */ @@ -193,20 +193,6 @@ void SysTick_Handler(void) /* please refer to the startup file (startup_stm32g4xx.s). */ /******************************************************************************/ -/** - * @brief This function handles FDCAN2 interrupt 0. - */ -void FDCAN2_IT0_IRQHandler(void) -{ - /* USER CODE BEGIN FDCAN2_IT0_IRQn 0 */ - - /* USER CODE END FDCAN2_IT0_IRQn 0 */ - HAL_FDCAN_IRQHandler(&hfdcan2); - /* USER CODE BEGIN FDCAN2_IT0_IRQn 1 */ - - /* USER CODE END FDCAN2_IT0_IRQn 1 */ -} - /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Src/tim.c b/G4NEOTESTING/Core/Src/tim.c deleted file mode 100644 index 7f521c3bf..000000000 --- a/G4NEOTESTING/Core/Src/tim.c +++ /dev/null @@ -1,79 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file tim.c - * @brief This file provides code for the configuration - * of the TIM instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2025 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "tim.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* TIM2 init function */ -void MX_TIM2_Init(void) -{ - - /* USER CODE BEGIN TIM2_Init 0 */ - - /* USER CODE END TIM2_Init 0 */ - - LL_TIM_InitTypeDef TIM_InitStruct = {0}; - LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - /* Peripheral clock enable */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); - - /* USER CODE BEGIN TIM2_Init 1 */ - - /* USER CODE END TIM2_Init 1 */ - TIM_InitStruct.Prescaler = 0; - TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - TIM_InitStruct.Autoreload = 4294967295; - TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - LL_TIM_Init(TIM2, &TIM_InitStruct); - LL_TIM_DisableARRPreload(TIM2); - LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_FORCED_ACTIVE; - TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE; - TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE; - TIM_OC_InitStruct.CompareValue = 0; - TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; - LL_TIM_OC_Init(TIM2, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct); - LL_TIM_OC_DisableFast(TIM2, LL_TIM_CHANNEL_CH1); - LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - LL_TIM_DisableMasterSlaveMode(TIM2); - /* USER CODE BEGIN TIM2_Init 2 */ - - /* USER CODE END TIM2_Init 2 */ - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); - /**TIM2 GPIO Configuration - PA0 ------> TIM2_CH1 - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_0; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_1; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/G4PERTESTING.ioc b/G4NEOTESTING/G4PERTESTING.ioc deleted file mode 100644 index 8cf1860b1..000000000 --- a/G4NEOTESTING/G4PERTESTING.ioc +++ /dev/null @@ -1,382 +0,0 @@ -#MicroXplorer Configuration settings - do not modify -ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_5 -ADC1.Channel-3\#ChannelRegularConversion=ADC_CHANNEL_7 -ADC1.Channel-4\#ChannelRegularConversion=ADC_CHANNEL_8 -ADC1.Channel-5\#ChannelRegularConversion=ADC_CHANNEL_9 -ADC1.Channel-6\#ChannelRegularConversion=ADC_CHANNEL_12 -ADC1.Channel-7\#ChannelRegularConversion=ADC_CHANNEL_15 -ADC1.ClockPrescaler=ADC_CLOCK_ASYNC_DIV256 -ADC1.CommonPathInternal=null|null|null|null -ADC1.ContinuousConvMode=ENABLE -ADC1.DMAContinuousRequests=ENABLE -ADC1.EOCSelection=ADC_EOC_SEQ_CONV -ADC1.ExternalTrigConv=ADC_SOFTWARE_START -ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,master,Rank-3\#ChannelRegularConversion,Channel-3\#ChannelRegularConversion,SamplingTime-3\#ChannelRegularConversion,OffsetNumber-3\#ChannelRegularConversion,Rank-4\#ChannelRegularConversion,Channel-4\#ChannelRegularConversion,SamplingTime-4\#ChannelRegularConversion,OffsetNumber-4\#ChannelRegularConversion,Rank-5\#ChannelRegularConversion,Channel-5\#ChannelRegularConversion,SamplingTime-5\#ChannelRegularConversion,OffsetNumber-5\#ChannelRegularConversion,Rank-6\#ChannelRegularConversion,Channel-6\#ChannelRegularConversion,SamplingTime-6\#ChannelRegularConversion,OffsetNumber-6\#ChannelRegularConversion,Rank-7\#ChannelRegularConversion,Channel-7\#ChannelRegularConversion,SamplingTime-7\#ChannelRegularConversion,OffsetNumber-7\#ChannelRegularConversion,NbrOfConversion,ContinuousConvMode,DMAContinuousRequests,ClockPrescaler,EOCSelection,ExternalTrigConv,CommonPathInternal -ADC1.NbrOfConversion=6 -ADC1.NbrOfConversionFlag=1 -ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.OffsetNumber-3\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.OffsetNumber-4\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.OffsetNumber-5\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.OffsetNumber-6\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.OffsetNumber-7\#ChannelRegularConversion=ADC_OFFSET_NONE -ADC1.Rank-2\#ChannelRegularConversion=1 -ADC1.Rank-3\#ChannelRegularConversion=2 -ADC1.Rank-4\#ChannelRegularConversion=3 -ADC1.Rank-5\#ChannelRegularConversion=4 -ADC1.Rank-6\#ChannelRegularConversion=5 -ADC1.Rank-7\#ChannelRegularConversion=6 -ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.SamplingTime-3\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.SamplingTime-4\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.SamplingTime-5\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.SamplingTime-6\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.SamplingTime-7\#ChannelRegularConversion=ADC_SAMPLETIME_92CYCLES_5 -ADC1.master=1 -CAD.formats=[] -CAD.pinconfig=Dual -CAD.provider= -Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY -Dma.ADC1.0.EventEnable=DISABLE -Dma.ADC1.0.Instance=DMA1_Channel1 -Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD -Dma.ADC1.0.MemInc=DMA_MINC_ENABLE -Dma.ADC1.0.Mode=DMA_CIRCULAR -Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD -Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE -Dma.ADC1.0.Polarity=HAL_DMAMUX_REQ_GEN_RISING -Dma.ADC1.0.Priority=DMA_PRIORITY_LOW -Dma.ADC1.0.RequestNumber=1 -Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber -Dma.ADC1.0.SignalID=NONE -Dma.ADC1.0.SyncEnable=DISABLE -Dma.ADC1.0.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT -Dma.ADC1.0.SyncRequestNumber=1 -Dma.ADC1.0.SyncSignalID=NONE -Dma.Request0=ADC1 -Dma.RequestsNb=1 -FDCAN2.AutoRetransmission=ENABLE -FDCAN2.CalculateBaudRateNominal=1000000 -FDCAN2.CalculateTimeBitNominal=1000 -FDCAN2.CalculateTimeQuantumNominal=6.25 -FDCAN2.DataPrescaler=8 -FDCAN2.DataSyncJumpWidth=16 -FDCAN2.DataTimeSeg1=14 -FDCAN2.DataTimeSeg2=5 -FDCAN2.ExtFiltersNbr=2 -FDCAN2.FrameFormat=FDCAN_FRAME_CLASSIC -FDCAN2.IPParameters=CalculateTimeQuantumNominal,CalculateTimeBitNominal,CalculateBaudRateNominal,FrameFormat,NominalTimeSeg1,NominalTimeSeg2,NominalPrescaler,AutoRetransmission,StdFiltersNbr,TransmitPause,NominalSyncJumpWidth,DataTimeSeg1,DataTimeSeg2,DataPrescaler,DataSyncJumpWidth,ExtFiltersNbr,ProtocolException -FDCAN2.NominalPrescaler=1 -FDCAN2.NominalSyncJumpWidth=16 -FDCAN2.NominalTimeSeg1=119 -FDCAN2.NominalTimeSeg2=40 -FDCAN2.ProtocolException=ENABLE -FDCAN2.StdFiltersNbr=0 -FDCAN2.TransmitPause=DISABLE -File.Version=6 -GPIO.groupedBy=Group By Peripherals -I2C2.IPParameters=Timing -I2C2.Timing=0x30D29DE4 -KeepUserPlacement=false -LPUART1.BaudRate=115200 -LPUART1.IPParameters=BaudRate -Mcu.CPN=STM32G474RET6 -Mcu.Family=STM32G4 -Mcu.IP0=ADC1 -Mcu.IP1=DMA -Mcu.IP10=USART1 -Mcu.IP2=FDCAN2 -Mcu.IP3=I2C2 -Mcu.IP4=LPUART1 -Mcu.IP5=NVIC -Mcu.IP6=RCC -Mcu.IP7=SPI3 -Mcu.IP8=SYS -Mcu.IP9=TIM2 -Mcu.IPNb=11 -Mcu.Name=STM32G474R(B-C-E)Tx -Mcu.Package=LQFP64 -Mcu.Pin0=PF0-OSC_IN -Mcu.Pin1=PF1-OSC_OUT -Mcu.Pin10=PA7 -Mcu.Pin11=PC4 -Mcu.Pin12=PC5 -Mcu.Pin13=PB0 -Mcu.Pin14=PB1 -Mcu.Pin15=PB11 -Mcu.Pin16=PB12 -Mcu.Pin17=PB13 -Mcu.Pin18=PB14 -Mcu.Pin19=PB15 -Mcu.Pin2=PC1 -Mcu.Pin20=PA8 -Mcu.Pin21=PA11 -Mcu.Pin22=PA12 -Mcu.Pin23=PA13 -Mcu.Pin24=PA14 -Mcu.Pin25=PC10 -Mcu.Pin26=PC11 -Mcu.Pin27=PC12 -Mcu.Pin28=PB3 -Mcu.Pin29=PB4 -Mcu.Pin3=PC2 -Mcu.Pin30=PB5 -Mcu.Pin31=PB6 -Mcu.Pin32=PB7 -Mcu.Pin33=PB8-BOOT0 -Mcu.Pin34=PB9 -Mcu.Pin35=VP_SYS_VS_Systick -Mcu.Pin36=VP_SYS_VS_DBSignals -Mcu.Pin37=VP_TIM2_VS_ClockSourceINT -Mcu.Pin4=PC3 -Mcu.Pin5=PA0 -Mcu.Pin6=PA2 -Mcu.Pin7=PA3 -Mcu.Pin8=PA5 -Mcu.Pin9=PA6 -Mcu.PinsNb=38 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32G474RETx -MxCube.Version=6.15.0 -MxDb.Version=DB.6.0.150 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.FDCAN2_IT0_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true -NVIC.ForceEnableDMAVector=false -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false -PA0.Signal=S_TIM2_CH1 -PA11.Locked=true -PA11.Mode=CTS_RTS -PA11.Signal=USART1_CTS -PA12.Locked=true -PA12.Mode=CTS_RTS -PA12.Signal=USART1_RTS -PA13.Locked=true -PA13.Mode=Trace_Asynchronous_SW -PA13.Signal=SYS_JTMS-SWDIO -PA14.Locked=true -PA14.Mode=Trace_Asynchronous_SW -PA14.Signal=SYS_JTCK-SWCLK -PA2.GPIOParameters=GPIO_Speed -PA2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH -PA2.Locked=true -PA2.Mode=Asynchronous -PA2.Signal=LPUART1_TX -PA3.GPIOParameters=GPIO_Speed -PA3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH -PA3.Locked=true -PA3.Mode=Asynchronous -PA3.Signal=LPUART1_RX -PA5.GPIOParameters=GPIO_Label -PA5.GPIO_Label=BLINKY -PA5.Locked=true -PA5.Signal=GPIO_Output -PA6.GPIOParameters=GPIO_Label -PA6.GPIO_Label=IMD_SENSE -PA6.Locked=true -PA6.Signal=ADC2_IN3 -PA7.GPIOParameters=GPIO_Label -PA7.GPIO_Label=AMS_SENSE -PA7.Locked=true -PA7.Signal=ADC2_IN4 -PA8.Mode=I2C -PA8.Signal=I2C2_SDA -PB0.GPIOParameters=GPIO_Label -PB0.GPIO_Label=BRAKE_F_SIGNAL -PB0.Locked=true -PB0.Mode=IN15-Single-Ended -PB0.Signal=ADC1_IN15 -PB1.GPIOParameters=GPIO_Label -PB1.GPIO_Label=BRAKE_R_SIGNAL -PB1.Locked=true -PB1.Mode=IN12-Single-Ended -PB1.Signal=ADC1_IN12 -PB11.GPIOParameters=GPIO_Label -PB11.GPIO_Label=LED_TEST -PB11.Locked=true -PB11.Signal=GPIO_Output -PB12.GPIOParameters=GPIO_Speed,GPIO_PuPd -PB12.GPIO_PuPd=GPIO_PULLUP -PB12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PB12.Locked=true -PB12.Mode=FDCAN_Activate -PB12.Signal=FDCAN2_RX -PB13.GPIOParameters=GPIO_Speed -PB13.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH -PB13.Locked=true -PB13.Mode=FDCAN_Activate -PB13.Signal=FDCAN2_TX -PB14.GPIOParameters=GPIO_Label -PB14.GPIO_Label=AUX_SIGNAL -PB14.Locked=true -PB14.Mode=IN5-Single-Ended -PB14.Signal=ADC1_IN5 -PB15.GPIOParameters=GPIO_Label -PB15.GPIO_Label=STEERING_ANGLE -PB15.Locked=true -PB15.Signal=ADC2_IN15 -PB3.Locked=true -PB3.Mode=Trace_Asynchronous_SW -PB3.Signal=SYS_JTDO-SWO -PB4.GPIOParameters=GPIO_Label -PB4.GPIO_Label=BRAKE_LIGHT -PB4.Locked=true -PB4.Signal=GPIO_Output -PB5.GPIOParameters=GPIO_Label -PB5.GPIO_Label=TSSI_G_CONTROL -PB5.Locked=true -PB5.Signal=GPIO_Output -PB6.Locked=true -PB6.Mode=Asynchronous -PB6.Signal=USART1_TX -PB7.Locked=true -PB7.Signal=UART4_CTS -PB8-BOOT0.GPIOParameters=GPIO_Label -PB8-BOOT0.GPIO_Label=AUX_CONTROL -PB8-BOOT0.Locked=true -PB8-BOOT0.Signal=GPIO_Output -PB9.GPIOParameters=GPIO_Label -PB9.GPIO_Label=SOFTWARE_OK_CONTROL -PB9.Locked=true -PB9.Signal=GPIO_Output -PC1.GPIOParameters=GPIO_Label -PC1.GPIO_Label=BSPD_SIGNAL -PC1.Locked=true -PC1.Mode=IN7-Single-Ended -PC1.Signal=ADC1_IN7 -PC10.Mode=Full_Duplex_Master -PC10.Signal=SPI3_SCK -PC11.Mode=Full_Duplex_Master -PC11.Signal=SPI3_MISO -PC12.Mode=Full_Duplex_Master -PC12.Signal=SPI3_MOSI -PC2.GPIOParameters=GPIO_Label -PC2.GPIO_Label=APPS1_SIGNAL -PC2.Locked=true -PC2.Mode=IN8-Single-Ended -PC2.Signal=ADC1_IN8 -PC3.GPIOParameters=GPIO_Label -PC3.GPIO_Label=APPS2_SIGNAL -PC3.Locked=true -PC3.Mode=IN9-Single-Ended -PC3.Signal=ADC1_IN9 -PC4.Mode=I2C -PC4.Signal=I2C2_SCL -PC5.Mode=Asynchronous -PC5.Signal=USART1_RX -PF0-OSC_IN.Locked=true -PF0-OSC_IN.Mode=HSE-External-Oscillator -PF0-OSC_IN.Signal=RCC_OSC_IN -PF1-OSC_OUT.Locked=true -PF1-OSC_OUT.Mode=HSE-External-Oscillator -PF1-OSC_OUT.Signal=RCC_OSC_OUT -PinOutPanel.RotationAngle=180 -ProjectManager.AskForMigrate=true -ProjectManager.BackupPrevious=false -ProjectManager.CompilerLinker=GCC -ProjectManager.CompilerOptimize=6 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=true -ProjectManager.CustomerFirmwarePackage= -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=true -ProjectManager.DeviceId=STM32G474RETx -ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.6.1 -ProjectManager.FreePins=true -ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=0 -ProjectManager.MainLocation=Core/Src -ProjectManager.NoMain=false -ProjectManager.PreviousToolchain= -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=G4PERTESTING.ioc -ProjectManager.ProjectName=G4PERTESTING -ProjectManager.ProjectStructure= -ProjectManager.RegisterCallBack= -ProjectManager.StackSize=0x400 -ProjectManager.TargetToolchain=CMake -ProjectManager.ToolChainLocation= -ProjectManager.UAScriptAfterPath= -ProjectManager.UAScriptBeforePath= -ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_DMA_Init-DMA-false-LL-true,4-MX_FDCAN2_Init-FDCAN2-false-HAL-true,5-MX_ADC1_Init-ADC1-false-LL-true,6-MX_LPUART1_UART_Init-LPUART1-false-LL-true,7-MX_I2C2_Init-I2C2-false-LL-true,8-MX_USART1_UART_Init-USART1-false-LL-true,9-MX_SPI3_Init-SPI3-false-LL-true,10-MX_TIM2_Init-TIM2-false-LL-true -RCC.ADC12Freq_Value=160000000 -RCC.ADC345Freq_Value=160000000 -RCC.AHBFreq_Value=160000000 -RCC.APB1Freq_Value=160000000 -RCC.APB1TimFreq_Value=160000000 -RCC.APB2Freq_Value=160000000 -RCC.APB2TimFreq_Value=160000000 -RCC.CRSFreq_Value=48000000 -RCC.CortexFreq_Value=160000000 -RCC.EXTERNAL_CLOCK_VALUE=12288000 -RCC.EnbaleCSS=true -RCC.FCLKCortexFreq_Value=160000000 -RCC.FDCANFreq_Value=160000000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=160000000 -RCC.HRTIM1Freq_Value=160000000 -RCC.HSE_VALUE=16000000 -RCC.HSI48_VALUE=48000000 -RCC.HSI_VALUE=16000000 -RCC.I2C1Freq_Value=160000000 -RCC.I2C2Freq_Value=160000000 -RCC.I2C3Freq_Value=160000000 -RCC.I2C4Freq_Value=160000000 -RCC.I2SFreq_Value=160000000 -RCC.IPParameters=ADC12Freq_Value,ADC345Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,EnbaleCSS,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HRTIM1Freq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,QSPIFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value -RCC.LPTIM1Freq_Value=160000000 -RCC.LPUART1Freq_Value=160000000 -RCC.LSCOPinFreq_Value=32000 -RCC.LSE_VALUE=32768 -RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=16000000 -RCC.PLLN=20 -RCC.PLLPoutputFreq_Value=160000000 -RCC.PLLQoutputFreq_Value=160000000 -RCC.PLLRCLKFreq_Value=160000000 -RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.PWRFreq_Value=160000000 -RCC.QSPIFreq_Value=160000000 -RCC.RNGFreq_Value=160000000 -RCC.SAI1Freq_Value=160000000 -RCC.SYSCLKFreq_VALUE=160000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.UART4Freq_Value=160000000 -RCC.UART5Freq_Value=160000000 -RCC.USART1Freq_Value=160000000 -RCC.USART2Freq_Value=160000000 -RCC.USART3Freq_Value=160000000 -RCC.USBFreq_Value=160000000 -RCC.VCOInputFreq_Value=16000000 -RCC.VCOOutputFreq_Value=320000000 -SH.S_TIM2_CH1.0=TIM2_CH1,Forced Output1 CH1 -SH.S_TIM2_CH1.ConfNb=1 -SPI3.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32 -SPI3.CalculateBaudRate=5.0 MBits/s -SPI3.Direction=SPI_DIRECTION_2LINES -SPI3.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate -SPI3.Mode=SPI_MODE_MASTER -SPI3.VirtualType=VM_MASTER -TIM2.Channel-Forced\ Output1\ CH1=TIM_CHANNEL_1 -TIM2.IPParameters=Channel-Forced Output1 CH1 -USART1.IPParameters=VirtualMode-Asynchronous -USART1.VirtualMode-Asynchronous=VM_ASYNC -VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals -VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals -VP_SYS_VS_Systick.Mode=SysTick -VP_SYS_VS_Systick.Signal=SYS_VS_Systick -VP_TIM2_VS_ClockSourceINT.Mode=Internal -VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT -board=custom From b8a13bc31ba890676b6dea183b96c1dea5868425 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:22:58 -0800 Subject: [PATCH 14/31] Surface level fixes, fixed SPI Signed-off-by: Daniel Hansen --- G4NEOTESTING/Core/Src/main.c | 13 +++++++------ Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h | 4 +++- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index a3fb2ad39..a3e95dedc 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -83,7 +83,7 @@ void MX_SPI1_Init(void) LL_SPI_InitTypeDef SPI_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - LL_APB1_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); @@ -91,7 +91,7 @@ void MX_SPI1_Init(void) // mosi GPIO_InitStruct.Pin = LL_GPIO_PIN_5; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_5; @@ -100,7 +100,7 @@ void MX_SPI1_Init(void) // miso GPIO_InitStruct.Pin = LL_GPIO_PIN_4; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? @@ -109,15 +109,15 @@ void MX_SPI1_Init(void) // sck (move off PB3/SWO to PA5) GPIO_InitStruct.Pin = LL_GPIO_PIN_5; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Alternate = LL_GPIO_AF_5; LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; + SPI_InitStruct.TransferDirection = LL_SPI_HALF_DUPLEX_TX; SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; + SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; @@ -128,6 +128,7 @@ void MX_SPI1_Init(void) LL_SPI_Init(SPI1, &SPI_InitStruct); LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(SPI1); + LL_SPI_Enable(SPI1); } int main(void) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index 18c8bc8ed..2cb886ba6 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -1,3 +1,5 @@ +#include + #include "main.h" #ifndef GR_NEOPIXEL_H @@ -27,4 +29,4 @@ void Neopixel_update(); // create a function to initialize SPI // initialize spi in gr_neopixel.c -#endif // GR_NEOPIXEL_H +#endif From 425493323347e5ca5de1ed66f627ada3d4a60794 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:23:32 -0800 Subject: [PATCH 15/31] Get a minimum viable probably working implementation Signed-off-by: Daniel Hansen --- .../NeoPixel/Inc/gr_neopixel.h | 56 ++++++-- .../NeoPixel/Src/gr_neopixel.c | 123 ++++++++++++++++-- 2 files changed, 154 insertions(+), 25 deletions(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index 2cb886ba6..eab50c4eb 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -5,24 +5,58 @@ #ifndef GR_NEOPIXEL_H #define GR_NEOPIXEL_H -#include +/** + * @brief Context containing all necessary information for controlling a Neopixel strip. + * @note Acquired by calling Neopixel_Setup with a NeopixelConfig struct. + * @note This struct is opaque to users of the library, its contents should not be accessed directly. All interactions with the Neopixel strip should be done through the provided functions in this library. + */ +typedef struct NeopixelContext NeopixelContext; + +/** + * @brief Configuration struct for Neopixel control. This should be initialized and passed to Neopixel_Setup before using any other functions in this library. + * @todo Add fields for GPIO pin, SPI settings, etc. + */ +typedef struct { + SPI_TypeDef *SPI_Instance; + uint32_t SPI_FrequencyHz; // FIXME This value should be calculated based off of passed in inputs used in MX_SPI1_Init + uint32_t LatchTimeUs; + uint32_t NumberOfNeopixels; + // TODO - Add fields for GPIO pin, SPI settings, etc. +} NeopixelConfig; +/** + * @brief Encodes a 24-bit GRB color into the format required for Neopixel transmission. + * @todo Add more experimentally found nice looking predetermined color options. + */ typedef enum { - COLOR_GREEN = (uint32_t)0xFF0000, + COLOR_OFF = (uint32_t)0x000000, COLOR_RED = (uint32_t)0x03FC00, + COLOR_ORANGE = (uint32_t)0x80FF00, + COLOR_YELLOW = (uint32_t)0xFFFF00, + COLOR_GREEN = (uint32_t)0xFF0000, COLOR_BLUE = (uint32_t)0x0000FF, -} Color; + COLOR_PURPLE = (uint32_t)0x00FF7F, + COLOR_WHITE = (uint32_t)0xFFFFFF, +} Neopixel_Color; -typedef union { - struct { - Color TS_Active; - Color RTD; - }; +typedef struct NeopixelContext NeopixelContext; - uint32_t rawData[2]; -} NeoPixelData; +/** + * @brief Initializes the Neopixel library with the provided configuration. This must be called before any other functions in this library. + * @note This function will allocate memory for the NeopixelContext struct. There is no corresponding de-initialization function, this is not an issue in practice since this is only expected to be called once at the beginning of the program. + * @param neopixelConfiguration A pointer to a NeopixelConfig struct containing the desired configuration for the Neopixel library. + * @return A pointer to a NeopixelContext struct that can be used for subsequent operations on the Neopixel strip. + */ +NeopixelContext* Neopixel_Setup(NeopixelConfig *neopixelConfiguration); -void Neopixel_update(); +/** + * @brief Writes an array of colors to the Neopixel strip. The number of colors must match the number of Neopixels configured in Neopixel_Setup. + * @note This function will block until the transmission is complete. + * @param colors An array of Neopixel_Color values to write to the strip. + * @param sizeofColors The total size of the colors array in bytes. This should correspond to the size of the NumberOfNeopixels field in the NeopixelConfig struct used to initialize the library. + * @return None + */ +void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, uint32_t sizeofColors); // make typedefs for all constants // create initialization structs (one for GPIO, one for SPI) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 3b10421b0..3fc6c0dc1 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -2,30 +2,125 @@ #include #include +#include +#include "main.h" #include "Logomatic.h" -void Neopixel_update() +#define BITS_PER_BYTE (8U) +#define MICROSECONDS_PER_SECOND (1000000UL) + +struct NeopixelContext { + // Configuration provided at setup + NeopixelConfig config; + // Number of zero bytes to send after color data to ensure latching, cached calculation from config parameters + uint32_t zeroTailBytes; +}; + +/** + * @brief Internal function to block execution until the SPI peripheral is no longer busy. This is used to ensure that we don't start a new transmission before the previous one has completed. + * @param context A pointer to the NeopixelContext containing the SPI instance to check. + * @return None + * @warning This function will block indefinitely if the SPI peripheral gets stuck in a busy state. This can happen if the SPI bus is not setup correctly. + */ +static void Neopixel_BlockWhileBusy(NeopixelContext *context) +{ + while (LL_SPI_IsActiveFlag_BSY(context->config.SPI_Instance)) {} +} + +void Neopixel_LatchStrip(NeopixelContext *context) +{ + Neopixel_BlockWhileBusy(context); + for (uint32_t i = 0; i < context->zeroTailBytes; i++) { + while (!LL_SPI_IsActiveFlag_TXE(context->config.SPI_Instance)) {} + LL_SPI_TransmitData8(context->config.SPI_Instance, 0x00); + } + Neopixel_BlockWhileBusy(context); +} + +NeopixelContext* Neopixel_Setup(NeopixelConfig *neopixelConfiguration) { + // TODO Abstraction + // - Add internal enums instead of using provided preprocessor values + // - Initialize GPIO for SPI from config + // - Initialize SPI peripheral with settings from config + // + // Essentially, main.c should be able to call this function with a config struct and not have to worry about the details of SPI or GPIO initialization. + // This will make it easier to reuse this code across different projects and microcontrollers in the future. + // + // TLDR + // Remove the call to MX_SPI1_Init from main.c, setup the SPI peripheral with the settings being determined by the NeopixelConfig struct passed in. + // NeopixelConfig should have the minimum necessary information to fully initialize the SPI peripheral for Neopixel control. + + // SETUP GPIO + + // SETUP SPI + + // ENABLE CLOCKS - NeoPixelData globalNeoPixelData = {0}; + // ENABLE SPI PERIPHERAL - // temp color set - globalNeoPixelData.RTD = 0x0000FF; - globalNeoPixelData.TS_Active = 0x0000FF; + if (neopixelConfiguration == NULL) { + LOGOMATIC("Neopixel configuration is NULL!\n"); + return NULL; + } + + NeopixelContext *context = malloc(sizeof(NeopixelContext)); - uint8_t neopixelTransmission[48]; - for (int i = 0; i < 2; i++) { - for (int j = 23; j >= 0; j--) { - neopixelTransmission[i * 24 + 23 - j] = 0x4 + ((globalNeoPixelData.rawData[i] >> j) & 0x1 << 1); // 0x06 is high, 0x04 is low - } + if (context == NULL) { + LOGOMATIC("Failed to allocate memory for Neopixel context!\n"); + return NULL; } - // HAL_SPI_Transmit(SPI1, neopixelTransmission, 48, 1000); + context->config = *neopixelConfiguration; + + // Calculate timings + + const uint64_t zerotail_divisor = BITS_PER_BYTE * MICROSECONDS_PER_SECOND; + const uint64_t zerotail_numerator = (uint64_t)context->config.SPI_FrequencyHz * (uint64_t)context->config.LatchTimeUs + zerotail_divisor - 1ULL; + context->zeroTailBytes = (uint32_t)(zerotail_numerator / zerotail_divisor); - // int test = sizeof(neopixelTransmission)/sizeof(neopixelTransmission[0]); + Neopixel_LatchStrip(context); - for (uint8_t i = 0; i < sizeof(neopixelTransmission); i++) { - LL_SPI_TransmitData8(SPI1, neopixelTransmission[i]); + return context; +} + +/** + * @brief Internal function to encode a 24-bit GRB color into the format required for Neopixel transmission. The encoded color is written to the provided buffer, which must be at least 24 bytes long. + * @param buffer A pointer to a buffer where the encoded color will be written. This buffer must be at least 24 bytes long. + * @param color A 24-bit GRB color to encode. The format of the color should be 0x00GGRRBB, where GG is the green component, RR is the red component, and BB is the blue component. + */ +static void Neopixel_EncodeColor(uint8_t *buffer, uint32_t color) +{ + for (int i = 23; i >= 0; i--) { + buffer[23 - i] = 0x4 + (((color >> i) & 0x1U) << 1); + } +} + +void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, uint32_t sizeofColors) +{ + // TODO Add null checks for all parameters + + if (context->config.NumberOfNeopixels * sizeof(Neopixel_Color) != sizeofColors) { + LOGOMATIC("Number of colors provided does not match number of Neopixels configured!\n"); + LOGOMATIC("Expected %lu colors, got %lu colors\n", context->config.NumberOfNeopixels, sizeofColors / sizeof(Neopixel_Color)); + assert_param(context->config.NumberOfNeopixels * sizeof(Neopixel_Color) == sizeofColors); + return; } + + uint8_t neopixelTransmission[context->config.NumberOfNeopixels * 24]; + for (uint32_t i = 0; i < context->config.NumberOfNeopixels; i++) { + Neopixel_EncodeColor(&neopixelTransmission[i * 24], colors[i]); + } + + Neopixel_BlockWhileBusy(context); + + for (uint32_t i = 0; i < sizeof(neopixelTransmission); i++) { + while (!LL_SPI_IsActiveFlag_TXE(context->config.SPI_Instance)) {} + LL_SPI_TransmitData8(context->config.SPI_Instance, neopixelTransmission[i]); + } + + Neopixel_LatchStrip(context); + + Neopixel_BlockWhileBusy(context); } From ac927d0cb5265433f1001bbf797f91fde9f5c51c Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:23:43 -0800 Subject: [PATCH 16/31] Test that implementation Signed-off-by: Daniel Hansen --- G4NEOTESTING/Core/Src/main.c | 77 +++++++++++++++++++++++++++++++++--- 1 file changed, 72 insertions(+), 5 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index a3e95dedc..05c518442 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -35,6 +35,70 @@ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ +#define NEOPIXEL_LED_COUNT 60U + +static Neopixel_Color neopixelColors[NEOPIXEL_LED_COUNT] = { + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, + COLOR_BLUE, + COLOR_PURPLE, + COLOR_WHITE, + COLOR_OFF, + COLOR_RED, + COLOR_ORANGE, + COLOR_YELLOW, + COLOR_GREEN, +}; /* USER CODE END PD */ @@ -59,6 +123,8 @@ LogomaticConfig logomaticConfig = {.clock_source = LOGOMATIC_PCLK1, .prescaler = LOGOMATIC_PRESCALER_DIV1, .tx_fifo_threshold = LOGOMATIC_FIFOTHRESHOLD_1_8, .rx_fifo_threshold = LOGOMATIC_FIFOTHRESHOLD_1_8}; + +NeopixelConfig neopixelConfig = {.SPI_Instance = SPI1, .SPI_FrequencyHz = 2656250U, .LatchTimeUs = 80U, .NumberOfNeopixels = 60U}; // TODO Expand with select configurable contents of MX_SPI1_Init /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ @@ -160,19 +226,20 @@ int main(void) /* Initialize all configured peripherals */ MX_SPI1_Init(); /* USER CODE BEGIN 2 */ - + NeopixelContext *neopixel_context = Neopixel_Setup(&neopixelConfig); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ - + LOGOMATIC("Rotating colors...\n"); /* USER CODE BEGIN 3 */ LL_mDelay(500); - Neopixel_update(); - - LOGOMATIC("Hello world! \n"); + Neopixel_WriteAll(neopixel_context, neopixelColors, sizeof(neopixelColors)); + for (uint32_t i = 0; i < NEOPIXEL_LED_COUNT; i++) { + neopixelColors[i] = neopixelColors[(i + 1) % NEOPIXEL_LED_COUNT]; + } } } From a674b09ccc6aafe901de32174202e05cd2dbc53e Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Mon, 16 Feb 2026 10:33:50 +0000 Subject: [PATCH 17/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 65 ++----------------- .../NeoPixel/Inc/gr_neopixel.h | 10 +-- .../NeoPixel/Src/gr_neopixel.c | 6 +- 3 files changed, 14 insertions(+), 67 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 05c518442..8f29b61e8 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -38,66 +38,11 @@ #define NEOPIXEL_LED_COUNT 60U static Neopixel_Color neopixelColors[NEOPIXEL_LED_COUNT] = { - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, - COLOR_BLUE, - COLOR_PURPLE, - COLOR_WHITE, - COLOR_OFF, - COLOR_RED, - COLOR_ORANGE, - COLOR_YELLOW, - COLOR_GREEN, + COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, + COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, + COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, + COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, + COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, COLOR_BLUE, COLOR_PURPLE, COLOR_WHITE, COLOR_OFF, COLOR_RED, COLOR_ORANGE, COLOR_YELLOW, COLOR_GREEN, }; /* USER CODE END PD */ diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index eab50c4eb..61360370d 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -8,7 +8,8 @@ /** * @brief Context containing all necessary information for controlling a Neopixel strip. * @note Acquired by calling Neopixel_Setup with a NeopixelConfig struct. - * @note This struct is opaque to users of the library, its contents should not be accessed directly. All interactions with the Neopixel strip should be done through the provided functions in this library. + * @note This struct is opaque to users of the library, its contents should not be accessed directly. All interactions with the Neopixel strip should be done through the provided functions in this + * library. */ typedef struct NeopixelContext NeopixelContext; @@ -18,7 +19,7 @@ typedef struct NeopixelContext NeopixelContext; */ typedef struct { SPI_TypeDef *SPI_Instance; - uint32_t SPI_FrequencyHz; // FIXME This value should be calculated based off of passed in inputs used in MX_SPI1_Init + uint32_t SPI_FrequencyHz; // FIXME This value should be calculated based off of passed in inputs used in MX_SPI1_Init uint32_t LatchTimeUs; uint32_t NumberOfNeopixels; // TODO - Add fields for GPIO pin, SPI settings, etc. @@ -43,11 +44,12 @@ typedef struct NeopixelContext NeopixelContext; /** * @brief Initializes the Neopixel library with the provided configuration. This must be called before any other functions in this library. - * @note This function will allocate memory for the NeopixelContext struct. There is no corresponding de-initialization function, this is not an issue in practice since this is only expected to be called once at the beginning of the program. + * @note This function will allocate memory for the NeopixelContext struct. There is no corresponding de-initialization function, this is not an issue in practice since this is only expected to be + * called once at the beginning of the program. * @param neopixelConfiguration A pointer to a NeopixelConfig struct containing the desired configuration for the Neopixel library. * @return A pointer to a NeopixelContext struct that can be used for subsequent operations on the Neopixel strip. */ -NeopixelContext* Neopixel_Setup(NeopixelConfig *neopixelConfiguration); +NeopixelContext *Neopixel_Setup(NeopixelConfig *neopixelConfiguration); /** * @brief Writes an array of colors to the Neopixel strip. The number of colors must match the number of Neopixels configured in Neopixel_Setup. diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 3fc6c0dc1..593340081 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -1,11 +1,11 @@ #include "gr_neopixel.h" +#include #include #include -#include -#include "main.h" #include "Logomatic.h" +#include "main.h" #define BITS_PER_BYTE (8U) #define MICROSECONDS_PER_SECOND (1000000UL) @@ -38,7 +38,7 @@ void Neopixel_LatchStrip(NeopixelContext *context) Neopixel_BlockWhileBusy(context); } -NeopixelContext* Neopixel_Setup(NeopixelConfig *neopixelConfiguration) +NeopixelContext *Neopixel_Setup(NeopixelConfig *neopixelConfiguration) { // TODO Abstraction // - Add internal enums instead of using provided preprocessor values From d9aa2d532eb23b1a9ddea4ef94e1fdea339ea3cb Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:36:19 -0800 Subject: [PATCH 18/31] Accidentally drag mouse in VS Code one time and it messes up all the folders smh Signed-off-by: Daniel Hansen --- G4NEOTESTING/CMakeLists.txt | 1 - G4NEOTESTING/Core/Src/main.c | 1 - G4NEOTESTING/Core/Src/spi.c | 95 ------------------- .../spi.h => G4PERTESTING/Core/Inc/usart.h | 15 +-- 4 files changed, 8 insertions(+), 104 deletions(-) delete mode 100644 G4NEOTESTING/Core/Src/spi.c rename G4NEOTESTING/Core/Inc/spi.h => G4PERTESTING/Core/Inc/usart.h (82%) diff --git a/G4NEOTESTING/CMakeLists.txt b/G4NEOTESTING/CMakeLists.txt index 057299075..788350066 100644 --- a/G4NEOTESTING/CMakeLists.txt +++ b/G4NEOTESTING/CMakeLists.txt @@ -30,7 +30,6 @@ target_sources( ${PROJECT_NAME}_USER_CODE INTERFACE Core/Src/main.c - Core/Src/spi.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c Core/Src/syscalls.c diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 8f29b61e8..ae605ce1b 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -21,7 +21,6 @@ #include "Logomatic.h" #include "gr_neopixel.h" -#include "spi.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ diff --git a/G4NEOTESTING/Core/Src/spi.c b/G4NEOTESTING/Core/Src/spi.c deleted file mode 100644 index 66459f2ec..000000000 --- a/G4NEOTESTING/Core/Src/spi.c +++ /dev/null @@ -1,95 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file spi.c - * @brief This file provides code for the configuration - * of the SPI instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "spi.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -/* SPI3 init function */ -void MX_SPI3_Init(void) -{ - - /* USER CODE BEGIN SPI3_Init 0 */ - - /* USER CODE END SPI3_Init 0 */ - - LL_SPI_InitTypeDef SPI_InitStruct = {0}; - - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - /* Peripheral clock enable */ - LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI3); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC); - /**SPI3 GPIO Configuration - PC10 ------> SPI3_SCK - PC11 ------> SPI3_MISO - PC12 ------> SPI3_MOSI - */ - GPIO_InitStruct.Pin = LL_GPIO_PIN_10; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_11; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - GPIO_InitStruct.Pin = LL_GPIO_PIN_12; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; - LL_GPIO_Init(GPIOC, &GPIO_InitStruct); - - /* USER CODE BEGIN SPI3_Init 1 */ - - /* USER CODE END SPI3_Init 1 */ - SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; - SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_4BIT; - SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV32; - SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - SPI_InitStruct.CRCPoly = 7; - LL_SPI_Init(SPI3, &SPI_InitStruct); - LL_SPI_SetStandard(SPI3, LL_SPI_PROTOCOL_MOTOROLA); - LL_SPI_EnableNSSPulseMgt(SPI3); - /* USER CODE BEGIN SPI3_Init 2 */ - - /* USER CODE END SPI3_Init 2 */ -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/G4NEOTESTING/Core/Inc/spi.h b/G4PERTESTING/Core/Inc/usart.h similarity index 82% rename from G4NEOTESTING/Core/Inc/spi.h rename to G4PERTESTING/Core/Inc/usart.h index 74bed003b..daefd73e6 100644 --- a/G4NEOTESTING/Core/Inc/spi.h +++ b/G4PERTESTING/Core/Inc/usart.h @@ -1,13 +1,13 @@ /* USER CODE BEGIN Header */ /** ****************************************************************************** - * @file spi.h + * @file usart.h * @brief This file contains all the function prototypes for - * the spi.c file + * the usart.c file ****************************************************************************** * @attention * - * Copyright (c) 2024 STMicroelectronics. + * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file @@ -18,8 +18,8 @@ */ /* USER CODE END Header */ /* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __SPI_H__ -#define __SPI_H__ +#ifndef __USART_H__ +#define __USART_H__ #ifdef __cplusplus extern "C" { @@ -36,7 +36,8 @@ extern "C" { /* USER CODE END Private defines */ -void MX_SPI3_Init(void); +void MX_LPUART1_UART_Init(void); +void MX_USART1_UART_Init(void); /* USER CODE BEGIN Prototypes */ @@ -46,4 +47,4 @@ void MX_SPI3_Init(void); } #endif -#endif /* __SPI_H__ */ +#endif /* __USART_H__ */ From 65f94ffc2fa7a807aa06199064ff1e594b2cf4b4 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:43:57 -0800 Subject: [PATCH 19/31] Specify the COPI pinout Signed-off-by: Daniel Hansen --- G4NEOTESTING/README.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/G4NEOTESTING/README.md b/G4NEOTESTING/README.md index 099ac620f..f1d7617ea 100644 --- a/G4NEOTESTING/README.md +++ b/G4NEOTESTING/README.md @@ -2,4 +2,7 @@ Nucleo-G474RE-C04 Plug in the board following ST-LINK pinout -Compile and flash G4ADCTESTING.elf +Compile and flash G4NEOTESTING.elf + +## Pinout +Uses SPI COPI on pin D4 (PB_5) From 7341a24686e5411a0584c2f3ee0edc8cac0cea7e Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:44:09 -0800 Subject: [PATCH 20/31] Shorten `MX_SPI1_Init` dramatically Signed-off-by: Daniel Hansen --- G4NEOTESTING/Core/Src/main.c | 70 +++++++++++++----------------------- 1 file changed, 24 insertions(+), 46 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index ae605ce1b..c2bad41ba 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -89,53 +89,31 @@ void SystemClock_Config(void); void MX_SPI1_Init(void) { - - LL_SPI_InitTypeDef SPI_InitStruct = {0}; - LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; - - LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); - - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA); + LL_GPIO_InitTypeDef copi_pin = { + .Pin = LL_GPIO_PIN_5, + .Mode = LL_GPIO_MODE_ALTERNATE, + .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, + .OutputType = LL_GPIO_OUTPUT_PUSHPULL, + .Pull = LL_GPIO_PULL_NO, + .Alternate = LL_GPIO_AF_5, + }; LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); - - // mosi - GPIO_InitStruct.Pin = LL_GPIO_PIN_5; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - // miso - GPIO_InitStruct.Pin = LL_GPIO_PIN_4; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_6; //? - LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - // sck (move off PB3/SWO to PA5) - GPIO_InitStruct.Pin = LL_GPIO_PIN_5; - GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - SPI_InitStruct.TransferDirection = LL_SPI_HALF_DUPLEX_TX; - SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_8BIT; - SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW; - SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64; - SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - SPI_InitStruct.CRCPoly = 7; - LL_SPI_Init(SPI1, &SPI_InitStruct); + LL_GPIO_Init(GPIOB, &copi_pin); + + LL_SPI_InitTypeDef sp1 = { + .TransferDirection = LL_SPI_HALF_DUPLEX_TX, + .Mode = LL_SPI_MODE_MASTER, + .DataWidth = LL_SPI_DATAWIDTH_8BIT, + .ClockPolarity = LL_SPI_POLARITY_LOW, + .ClockPhase = LL_SPI_PHASE_1EDGE, + .NSS = LL_SPI_NSS_SOFT, + .BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64, + .BitOrder = LL_SPI_MSB_FIRST, + .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, + .CRCPoly = 7, + }; + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); + LL_SPI_Init(SPI1, &sp1); LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(SPI1); LL_SPI_Enable(SPI1); From 2e9c312e24f1a9a5cf50ada1af23c80c6878bcda Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Mon, 16 Feb 2026 10:45:14 +0000 Subject: [PATCH 21/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/main.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index c2bad41ba..40d2b1b80 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -90,27 +90,27 @@ void SystemClock_Config(void); void MX_SPI1_Init(void) { LL_GPIO_InitTypeDef copi_pin = { - .Pin = LL_GPIO_PIN_5, - .Mode = LL_GPIO_MODE_ALTERNATE, - .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, - .OutputType = LL_GPIO_OUTPUT_PUSHPULL, - .Pull = LL_GPIO_PULL_NO, - .Alternate = LL_GPIO_AF_5, + .Pin = LL_GPIO_PIN_5, + .Mode = LL_GPIO_MODE_ALTERNATE, + .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, + .OutputType = LL_GPIO_OUTPUT_PUSHPULL, + .Pull = LL_GPIO_PULL_NO, + .Alternate = LL_GPIO_AF_5, }; LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); LL_GPIO_Init(GPIOB, &copi_pin); LL_SPI_InitTypeDef sp1 = { - .TransferDirection = LL_SPI_HALF_DUPLEX_TX, - .Mode = LL_SPI_MODE_MASTER, - .DataWidth = LL_SPI_DATAWIDTH_8BIT, - .ClockPolarity = LL_SPI_POLARITY_LOW, - .ClockPhase = LL_SPI_PHASE_1EDGE, - .NSS = LL_SPI_NSS_SOFT, - .BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64, - .BitOrder = LL_SPI_MSB_FIRST, - .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, - .CRCPoly = 7, + .TransferDirection = LL_SPI_HALF_DUPLEX_TX, + .Mode = LL_SPI_MODE_MASTER, + .DataWidth = LL_SPI_DATAWIDTH_8BIT, + .ClockPolarity = LL_SPI_POLARITY_LOW, + .ClockPhase = LL_SPI_PHASE_1EDGE, + .NSS = LL_SPI_NSS_SOFT, + .BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64, + .BitOrder = LL_SPI_MSB_FIRST, + .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, + .CRCPoly = 7, }; LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); LL_SPI_Init(SPI1, &sp1); From 5fe43ee8027a09db5ce2478d8b52ec393f7c8de5 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:49:50 -0800 Subject: [PATCH 22/31] Cleanup random GPIO pin definitions Signed-off-by: Daniel Hansen --- G4NEOTESTING/Core/Inc/main.h | 32 ++------------------------------ G4NEOTESTING/Core/Src/main.c | 4 ++-- 2 files changed, 4 insertions(+), 32 deletions(-) diff --git a/G4NEOTESTING/Core/Inc/main.h b/G4NEOTESTING/Core/Inc/main.h index 23d7ffce4..26e5ea0e6 100644 --- a/G4NEOTESTING/Core/Inc/main.h +++ b/G4NEOTESTING/Core/Inc/main.h @@ -73,36 +73,8 @@ void Error_Handler(void); /* USER CODE END EFP */ /* Private defines -----------------------------------------------------------*/ -#define BSPD_SIGNAL_Pin LL_GPIO_PIN_1 -#define BSPD_SIGNAL_GPIO_Port GPIOC -#define APPS1_SIGNAL_Pin LL_GPIO_PIN_2 -#define APPS1_SIGNAL_GPIO_Port GPIOC -#define APPS2_SIGNAL_Pin LL_GPIO_PIN_3 -#define APPS2_SIGNAL_GPIO_Port GPIOC -#define BLINKY_Pin LL_GPIO_PIN_5 -#define BLINKY_GPIO_Port GPIOA -#define IMD_SENSE_Pin LL_GPIO_PIN_6 -#define IMD_SENSE_GPIO_Port GPIOA -#define AMS_SENSE_Pin LL_GPIO_PIN_7 -#define AMS_SENSE_GPIO_Port GPIOA -#define BRAKE_F_SIGNAL_Pin LL_GPIO_PIN_0 -#define BRAKE_F_SIGNAL_GPIO_Port GPIOB -#define BRAKE_R_SIGNAL_Pin LL_GPIO_PIN_1 -#define BRAKE_R_SIGNAL_GPIO_Port GPIOB -#define LED_TEST_Pin LL_GPIO_PIN_11 -#define LED_TEST_GPIO_Port GPIOB -#define AUX_SIGNAL_Pin LL_GPIO_PIN_14 -#define AUX_SIGNAL_GPIO_Port GPIOB -#define STEERING_ANGLE_Pin LL_GPIO_PIN_15 -#define STEERING_ANGLE_GPIO_Port GPIOB -#define BRAKE_LIGHT_Pin LL_GPIO_PIN_4 -#define BRAKE_LIGHT_GPIO_Port GPIOB -#define TSSI_G_CONTROL_Pin LL_GPIO_PIN_5 -#define TSSI_G_CONTROL_GPIO_Port GPIOB -#define AUX_CONTROL_Pin LL_GPIO_PIN_8 -#define AUX_CONTROL_GPIO_Port GPIOB -#define SOFTWARE_OK_CONTROL_Pin LL_GPIO_PIN_9 -#define SOFTWARE_OK_CONTROL_GPIO_Port GPIOB +#define NEOPIXEL_DIN_Pin LL_GPIO_PIN_5 +#define NEOPIXEL_DIN_GPIO_Port GPIOB /* USER CODE BEGIN Private defines */ diff --git a/G4NEOTESTING/Core/Src/main.c b/G4NEOTESTING/Core/Src/main.c index 40d2b1b80..96fff2926 100644 --- a/G4NEOTESTING/Core/Src/main.c +++ b/G4NEOTESTING/Core/Src/main.c @@ -90,7 +90,7 @@ void SystemClock_Config(void); void MX_SPI1_Init(void) { LL_GPIO_InitTypeDef copi_pin = { - .Pin = LL_GPIO_PIN_5, + .Pin = NEOPIXEL_DIN_Pin, .Mode = LL_GPIO_MODE_ALTERNATE, .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, .OutputType = LL_GPIO_OUTPUT_PUSHPULL, @@ -98,7 +98,7 @@ void MX_SPI1_Init(void) .Alternate = LL_GPIO_AF_5, }; LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); - LL_GPIO_Init(GPIOB, &copi_pin); + LL_GPIO_Init(NEOPIXEL_DIN_GPIO_Port, &copi_pin); LL_SPI_InitTypeDef sp1 = { .TransferDirection = LL_SPI_HALF_DUPLEX_TX, From fd34bce72af957b0c9694deb92b360366b740aab Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:52:56 -0800 Subject: [PATCH 23/31] Duplicate typedef structs Signed-off-by: Daniel Hansen --- Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index 61360370d..bc46854d0 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -40,8 +40,6 @@ typedef enum { COLOR_WHITE = (uint32_t)0xFFFFFF, } Neopixel_Color; -typedef struct NeopixelContext NeopixelContext; - /** * @brief Initializes the Neopixel library with the provided configuration. This must be called before any other functions in this library. * @note This function will allocate memory for the NeopixelContext struct. There is no corresponding de-initialization function, this is not an issue in practice since this is only expected to be From 367c3bb72cece64a44825fb84f8273117e2abf1d Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Mon, 16 Feb 2026 02:54:05 -0800 Subject: [PATCH 24/31] Somehow changed startup assembly file Signed-off-by: Daniel Hansen --- Lib/Platform/STM32G474xE/startup_stm32g474xx.s | 1 + 1 file changed, 1 insertion(+) diff --git a/Lib/Platform/STM32G474xE/startup_stm32g474xx.s b/Lib/Platform/STM32G474xE/startup_stm32g474xx.s index 16516e321..f862ed858 100644 --- a/Lib/Platform/STM32G474xE/startup_stm32g474xx.s +++ b/Lib/Platform/STM32G474xE/startup_stm32g474xx.s @@ -593,3 +593,4 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler + From a3fad72d8b5cdbd81cacb50b8c86fff280db3774 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Mon, 16 Feb 2026 12:10:17 +0000 Subject: [PATCH 25/31] Automatic Clang-Format: Standardized formatting automatically --- G4NEOTESTING/Core/Src/syscalls.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/G4NEOTESTING/Core/Src/syscalls.c b/G4NEOTESTING/Core/Src/syscalls.c index 9b1a4a471..a59a7d089 100644 --- a/G4NEOTESTING/Core/Src/syscalls.c +++ b/G4NEOTESTING/Core/Src/syscalls.c @@ -40,7 +40,10 @@ char **environ = __env; /* Functions */ void initialise_monitor_handles() {} -int _getpid(void) { return 1; } +int _getpid(void) +{ + return 1; +} int _kill(int pid, int sig) { From 462cd069302123470a870b5b936f14be02d4c1f4 Mon Sep 17 00:00:00 2001 From: Daniel Hansen <105574022+dchansen06@users.noreply.github.com> Date: Mon, 16 Feb 2026 14:43:29 -0800 Subject: [PATCH 26/31] Update build command in tasks.json to use presets Signed-off-by: Daniel Hansen <105574022+dchansen06@users.noreply.github.com> --- .vscode/tasks.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.vscode/tasks.json b/.vscode/tasks.json index c254e6b15..9b903d6aa 100644 --- a/.vscode/tasks.json +++ b/.vscode/tasks.json @@ -70,7 +70,7 @@ "dependsOn": [ "CMake: configure" ], - "command": "cmake --build build/${command:cmake.activeBuildPresetName} --target G4NEOTESTING" + "command": "cmake --build --preset ${command:cmake.activeBuildPresetName} --target G4NEOTESTING" }, { "label": "CMake: configure and build G4BLINKY", From 20de7d3fb093f4dce26c5cd5bab1520d8aa14385 Mon Sep 17 00:00:00 2001 From: Shravya Salem Sathish Date: Thu, 19 Feb 2026 21:03:02 -0800 Subject: [PATCH 27/31] Added enums for GPIO Pins and alternate functions --- .../NeoPixel/Inc/gr_neopixel.h | 79 +++++++++++++++++++ .../NeoPixel/Src/gr_neopixel.c | 2 + 2 files changed, 81 insertions(+) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index bc46854d0..3b61ec60e 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -5,6 +5,49 @@ #ifndef GR_NEOPIXEL_H #define GR_NEOPIXEL_H +// @brief Pin to configure GPIO on for NeoPixel +typedef enum { + GPIO_PIN_0 = LL_GPIO_PIN_0, + GPIO_PIN_1 = LL_GPIO_PIN_1, + GPIO_PIN_2 = LL_GPIO_PIN_2, + GPIO_PIN_3 = LL_GPIO_PIN_3, + GPIO_PIN_4 = LL_GPIO_PIN_4, + GPIO_PIN_5 = LL_GPIO_PIN_5, + GPIO_PIN_6 = LL_GPIO_PIN_6, + GPIO_PIN_7 = LL_GPIO_PIN_7, + GPIO_PIN_8 = LL_GPIO_PIN_8, + GPIO_PIN_9 = LL_GPIO_PIN_9, + GPIO_PIN_10 = LL_GPIO_PIN_10, + GPIO_PIN_11 = LL_GPIO_PIN_11, + GPIO_PIN_12 = LL_GPIO_PIN_12, + GPIO_PIN_13 = LL_GPIO_PIN_13, + GPIO_PIN_14 = LL_GPIO_PIN_14, + GPIO_PIN_15 = LL_GPIO_PIN_15 +} GPIO_Pins; + +/// @brief Alternate function for a specific pin and specific port +// Technically can be set for AF 0-15 for low and high registers separately +typedef enum { + GPIO_AF_0 = LL_GPIO_AF_0, + GPIO_AF_1 = LL_GPIO_AF_1, + GPIO_AF_2 = LL_GPIO_AF_2, + GPIO_AF_3 = LL_GPIO_AF_3, + GPIO_AF_4 = LL_GPIO_AF_4, + GPIO_AF_5 = LL_GPIO_AF_5, + GPIO_AF_6 = LL_GPIO_AF_6, + GPIO_AF_7 = LL_GPIO_AF_7, + GPIO_AF_8 = LL_GPIO_AF_8, + GPIO_AF_9 = LL_GPIO_AF_9, + GPIO_AF_10 = LL_GPIO_AF_10, + GPIO_AF_11 = LL_GPIO_AF_11, + GPIO_AF_12 = LL_GPIO_AF_12, + GPIO_AF_13 = LL_GPIO_AF_13, + GPIO_AF_14 = LL_GPIO_AF_14, + GPIO_AF_15 = LL_GPIO_AF_15 +} GPIO_Alternate_Function; + + + /** * @brief Context containing all necessary information for controlling a Neopixel strip. * @note Acquired by calling Neopixel_Setup with a NeopixelConfig struct. @@ -23,6 +66,7 @@ typedef struct { uint32_t LatchTimeUs; uint32_t NumberOfNeopixels; // TODO - Add fields for GPIO pin, SPI settings, etc. + // } NeopixelConfig; /** @@ -63,4 +107,39 @@ void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, u // create a function to initialize SPI // initialize spi in gr_neopixel.c + #endif + +/* for quick access +void MX_SPI1_Init(void) +{ + LL_GPIO_InitTypeDef copi_pin = { + .Pin = NEOPIXEL_DIN_Pin, //adjustable? + .Mode = LL_GPIO_MODE_ALTERNATE, + .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, + .OutputType = LL_GPIO_OUTPUT_PUSHPULL, + .Pull = LL_GPIO_PULL_NO, + .Alternate = LL_GPIO_AF_5, // adjustable? + }; + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); //adjustable? + LL_GPIO_Init(NEOPIXEL_DIN_GPIO_Port, &copi_pin); + + LL_SPI_InitTypeDef sp1 = { + .TransferDirection = LL_SPI_HALF_DUPLEX_TX, + .Mode = LL_SPI_MODE_MASTER, + .DataWidth = LL_SPI_DATAWIDTH_8BIT, + .ClockPolarity = LL_SPI_POLARITY_LOW, + .ClockPhase = LL_SPI_PHASE_1EDGE, + .NSS = LL_SPI_NSS_SOFT, + .BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64, + .BitOrder = LL_SPI_MSB_FIRST, + .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, + .CRCPoly = 7, + }; + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); //adjustable? + LL_SPI_Init(SPI1, &sp1); + LL_SPI_SetStandard(SPI1, LL_SPI_PROTOCOL_MOTOROLA); + LL_SPI_EnableNSSPulseMgt(SPI1); + LL_SPI_Enable(SPI1); +} +*/ diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index 593340081..f5edc0f8d 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -100,6 +100,8 @@ static void Neopixel_EncodeColor(uint8_t *buffer, uint32_t color) void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, uint32_t sizeofColors) { // TODO Add null checks for all parameters + if(context == NULL) return; //possiblty works + if(colors == NULL) return; //possiblty works if (context->config.NumberOfNeopixels * sizeof(Neopixel_Color) != sizeofColors) { LOGOMATIC("Number of colors provided does not match number of Neopixels configured!\n"); From a6422a3f25c9632a4ae8c883058bd35e3b7ee7e3 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Fri, 20 Feb 2026 05:15:59 +0000 Subject: [PATCH 28/31] Automatic Clang-Format: Standardized formatting automatically --- Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h | 3 --- Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c | 8 ++++++-- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index 3b61ec60e..4fe63a169 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -46,8 +46,6 @@ typedef enum { GPIO_AF_15 = LL_GPIO_AF_15 } GPIO_Alternate_Function; - - /** * @brief Context containing all necessary information for controlling a Neopixel strip. * @note Acquired by calling Neopixel_Setup with a NeopixelConfig struct. @@ -107,7 +105,6 @@ void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, u // create a function to initialize SPI // initialize spi in gr_neopixel.c - #endif /* for quick access diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index f5edc0f8d..f567c4b6b 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -100,8 +100,12 @@ static void Neopixel_EncodeColor(uint8_t *buffer, uint32_t color) void Neopixel_WriteAll(NeopixelContext *context, const Neopixel_Color *colors, uint32_t sizeofColors) { // TODO Add null checks for all parameters - if(context == NULL) return; //possiblty works - if(colors == NULL) return; //possiblty works + if (context == NULL) { + return; // possiblty works + } + if (colors == NULL) { + return; // possiblty works + } if (context->config.NumberOfNeopixels * sizeof(Neopixel_Color) != sizeofColors) { LOGOMATIC("Number of colors provided does not match number of Neopixels configured!\n"); From 8dbe1bcf9e9fbc630b5ff611578225151a5776f8 Mon Sep 17 00:00:00 2001 From: Shravya Salem Sathish Date: Thu, 19 Feb 2026 22:24:48 -0800 Subject: [PATCH 29/31] In progress updates --- .../NeoPixel/Inc/gr_neopixel.h | 7 ++++ .../NeoPixel/Src/gr_neopixel.c | 36 ++++++++++++++----- 2 files changed, 35 insertions(+), 8 deletions(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index 4fe63a169..e986b4ef3 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -25,6 +25,8 @@ typedef enum { GPIO_PIN_15 = LL_GPIO_PIN_15 } GPIO_Pins; +typedef enum {GPIOA, GPIOB, GPIOC, GPIOD} GPIO_Port; + /// @brief Alternate function for a specific pin and specific port // Technically can be set for AF 0-15 for low and high registers separately typedef enum { @@ -46,6 +48,8 @@ typedef enum { GPIO_AF_15 = LL_GPIO_AF_15 } GPIO_Alternate_Function; +// TODO: enum for GPIO ports + /** * @brief Context containing all necessary information for controlling a Neopixel strip. * @note Acquired by calling Neopixel_Setup with a NeopixelConfig struct. @@ -63,6 +67,9 @@ typedef struct { uint32_t SPI_FrequencyHz; // FIXME This value should be calculated based off of passed in inputs used in MX_SPI1_Init uint32_t LatchTimeUs; uint32_t NumberOfNeopixels; + GPIO_Pins gpio_pin; + GPIO_Alternate_Function alternate_function; +GPIO_Port gpio_port; // TODO - Add fields for GPIO pin, SPI settings, etc. // } NeopixelConfig; diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index f567c4b6b..e27b1f103 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -52,14 +52,34 @@ NeopixelContext *Neopixel_Setup(NeopixelConfig *neopixelConfiguration) // Remove the call to MX_SPI1_Init from main.c, setup the SPI peripheral with the settings being determined by the NeopixelConfig struct passed in. // NeopixelConfig should have the minimum necessary information to fully initialize the SPI peripheral for Neopixel control. - // SETUP GPIO - - // SETUP SPI - - // ENABLE CLOCKS - - // ENABLE SPI PERIPHERAL - + LL_GPIO_InitTypeDef copi_pin = { + .Pin = neopixelConfiguration->gpio_pin, + .Mode = LL_GPIO_MODE_ALTERNATE, + .Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH, + .OutputType = LL_GPIO_OUTPUT_PUSHPULL, + .Pull = LL_GPIO_PULL_NO, + .Alternate = neopixelConfiguration->alternate_function, + }; + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); //Only SPI1 takes AHB2, SPI2 and 3 take AHB1 + LL_GPIO_Init(neopixelConfiguration->gpio_port, &copi_pin); + + LL_SPI_InitTypeDef spi = { + .TransferDirection = LL_SPI_HALF_DUPLEX_TX, + .Mode = LL_SPI_MODE_MASTER, + .DataWidth = LL_SPI_DATAWIDTH_8BIT, + .ClockPolarity = LL_SPI_POLARITY_LOW, + .ClockPhase = LL_SPI_PHASE_1EDGE, + .NSS = LL_SPI_NSS_SOFT, + .BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV64, + .BitOrder = LL_SPI_MSB_FIRST, + .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, + .CRCPoly = 7, + }; + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);//Enable clock twice (see line 64) + LL_SPI_Init(neopixelConfiguration->SPI_Instance, &spi); + LL_SPI_SetStandard(neopixelConfiguration->SPI_Instance, LL_SPI_PROTOCOL_MOTOROLA); + LL_SPI_EnableNSSPulseMgt(neopixelConfiguration->SPI_Instance); + LL_SPI_Enable(neopixelConfiguration->SPI_Instance); if (neopixelConfiguration == NULL) { LOGOMATIC("Neopixel configuration is NULL!\n"); return NULL; From 7834b242b6bca671fab0ad1a24fba8b92e4a1105 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Fri, 20 Feb 2026 06:27:07 +0000 Subject: [PATCH 30/31] Automatic Clang-Format: Standardized formatting automatically --- Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h | 9 +++++++-- Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c | 4 ++-- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h index e986b4ef3..1cf809c36 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h +++ b/Lib/FancyLayers-RENAME/NeoPixel/Inc/gr_neopixel.h @@ -25,7 +25,12 @@ typedef enum { GPIO_PIN_15 = LL_GPIO_PIN_15 } GPIO_Pins; -typedef enum {GPIOA, GPIOB, GPIOC, GPIOD} GPIO_Port; +typedef enum { + GPIOA, + GPIOB, + GPIOC, + GPIOD +} GPIO_Port; /// @brief Alternate function for a specific pin and specific port // Technically can be set for AF 0-15 for low and high registers separately @@ -69,7 +74,7 @@ typedef struct { uint32_t NumberOfNeopixels; GPIO_Pins gpio_pin; GPIO_Alternate_Function alternate_function; -GPIO_Port gpio_port; + GPIO_Port gpio_port; // TODO - Add fields for GPIO pin, SPI settings, etc. // } NeopixelConfig; diff --git a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c index e27b1f103..bdd94de68 100644 --- a/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c +++ b/Lib/FancyLayers-RENAME/NeoPixel/Src/gr_neopixel.c @@ -60,7 +60,7 @@ NeopixelContext *Neopixel_Setup(NeopixelConfig *neopixelConfiguration) .Pull = LL_GPIO_PULL_NO, .Alternate = neopixelConfiguration->alternate_function, }; - LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); //Only SPI1 takes AHB2, SPI2 and 3 take AHB1 + LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB); // Only SPI1 takes AHB2, SPI2 and 3 take AHB1 LL_GPIO_Init(neopixelConfiguration->gpio_port, &copi_pin); LL_SPI_InitTypeDef spi = { @@ -75,7 +75,7 @@ NeopixelContext *Neopixel_Setup(NeopixelConfig *neopixelConfiguration) .CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE, .CRCPoly = 7, }; - LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);//Enable clock twice (see line 64) + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1); // Enable clock twice (see line 64) LL_SPI_Init(neopixelConfiguration->SPI_Instance, &spi); LL_SPI_SetStandard(neopixelConfiguration->SPI_Instance, LL_SPI_PROTOCOL_MOTOROLA); LL_SPI_EnableNSSPulseMgt(neopixelConfiguration->SPI_Instance); From d38c8ea5140a23bdd9af4d2f3fb345999b4be826 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Fri, 20 Feb 2026 02:23:50 -0800 Subject: [PATCH 31/31] Remove no longer needed files Signed-off-by: Daniel Hansen --- G4NEOTESTING/CMakeLists.txt | 3 - G4NEOTESTING/Core/Src/syscalls.c | 168 ------------- G4NEOTESTING/Core/Src/sysmem.c | 77 ------ G4NEOTESTING/Core/Src/system_stm32g4xx.c | 289 ----------------------- 4 files changed, 537 deletions(-) delete mode 100644 G4NEOTESTING/Core/Src/syscalls.c delete mode 100644 G4NEOTESTING/Core/Src/sysmem.c delete mode 100644 G4NEOTESTING/Core/Src/system_stm32g4xx.c diff --git a/G4NEOTESTING/CMakeLists.txt b/G4NEOTESTING/CMakeLists.txt index 788350066..21af9929e 100644 --- a/G4NEOTESTING/CMakeLists.txt +++ b/G4NEOTESTING/CMakeLists.txt @@ -32,9 +32,6 @@ target_sources( Core/Src/main.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c ) target_link_libraries(${PROJECT_NAME}_USER_CODE INTERFACE GR_NEOPIXEL) diff --git a/G4NEOTESTING/Core/Src/syscalls.c b/G4NEOTESTING/Core/Src/syscalls.c deleted file mode 100644 index a59a7d089..000000000 --- a/G4NEOTESTING/Core/Src/syscalls.c +++ /dev/null @@ -1,168 +0,0 @@ -/** - ****************************************************************************** - * @file syscalls.c - * @author Auto-generated by STM32CubeMX - * @brief Minimal System calls file - * - * For more information about which c-functions - * need which of these lowlevel functions - * please consult the Newlib libc-manual - ****************************************************************************** - * @attention - * - * Copyright (c) 2020-2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Includes */ -#include -#include -#include -#include -#include -#include -#include -#include - -/* Variables */ -extern int __io_putchar(int ch) __attribute__((weak)); -extern int __io_getchar(void) __attribute__((weak)); - -char *__env[1] = {0}; -char **environ = __env; - -/* Functions */ -void initialise_monitor_handles() {} - -int _getpid(void) -{ - return 1; -} - -int _kill(int pid, int sig) -{ - (void)pid; - (void)sig; - errno = EINVAL; - return -1; -} - -void _exit(int status) -{ - _kill(status, -1); - while (1) {} /* Make sure we hang here */ -} - -__attribute__((weak)) int _read(int file, char *ptr, int len) -{ - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) { - *ptr++ = __io_getchar(); - } - - return len; -} - -__attribute__((weak)) int _write(int file, char *ptr, int len) -{ - (void)file; - int DataIdx; - - for (DataIdx = 0; DataIdx < len; DataIdx++) { - __io_putchar(*ptr++); - } - return len; -} - -int _close(int file) -{ - (void)file; - return -1; -} - -int _fstat(int file, struct stat *st) -{ - (void)file; - st->st_mode = S_IFCHR; - return 0; -} - -int _isatty(int file) -{ - (void)file; - return 1; -} - -int _lseek(int file, int ptr, int dir) -{ - (void)file; - (void)ptr; - (void)dir; - return 0; -} - -int _open(char *path, int flags, ...) -{ - (void)path; - (void)flags; - /* Pretend like we always fail */ - return -1; -} - -int _wait(int *status) -{ - (void)status; - errno = ECHILD; - return -1; -} - -int _unlink(char *name) -{ - (void)name; - errno = ENOENT; - return -1; -} - -int _times(struct tms *buf) -{ - (void)buf; - return -1; -} - -int _stat(char *file, struct stat *st) -{ - (void)file; - st->st_mode = S_IFCHR; - return 0; -} - -int _link(char *old, char *new) -{ - (void)old; - (void)new; - errno = EMLINK; - return -1; -} - -int _fork(void) -{ - errno = EAGAIN; - return -1; -} - -int _execve(char *name, char **argv, char **env) -{ - (void)name; - (void)argv; - (void)env; - errno = ENOMEM; - return -1; -} diff --git a/G4NEOTESTING/Core/Src/sysmem.c b/G4NEOTESTING/Core/Src/sysmem.c deleted file mode 100644 index 00c397937..000000000 --- a/G4NEOTESTING/Core/Src/sysmem.c +++ /dev/null @@ -1,77 +0,0 @@ -/** - ****************************************************************************** - * @file sysmem.c - * @author Generated by STM32CubeMX - * @brief System Memory calls file - * - * For more information about which C functions - * need which of these lowlevel functions - * please consult the newlib libc manual - ****************************************************************************** - * @attention - * - * Copyright (c) 2024 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Includes */ -#include -#include - -/** - * Pointer to the current high watermark of the heap usage - */ -static uint8_t *__sbrk_heap_end = NULL; - -/** - * @brief _sbrk() allocates memory to the newlib heap and is used by malloc - * and others from the C library - * - * @verbatim - * ############################################################################ - * # .data # .bss # newlib heap # MSP stack # - * # # # # Reserved by _Min_Stack_Size # - * ############################################################################ - * ^-- RAM start ^-- _end _estack, RAM end --^ - * @endverbatim - * - * This implementation starts allocating at the '_end' linker symbol - * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack - * The implementation considers '_estack' linker symbol to be RAM end - * NOTE: If the MSP stack, at any point during execution, grows larger than the - * reserved size, please increase the '_Min_Stack_Size'. - * - * @param incr Memory size - * @return Pointer to allocated memory - */ -void *_sbrk(ptrdiff_t incr) -{ - extern uint8_t _end; /* Symbol defined in the linker script */ - extern uint8_t _estack; /* Symbol defined in the linker script */ - extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ - const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; - const uint8_t *max_heap = (uint8_t *)stack_limit; - uint8_t *prev_heap_end; - - /* Initialize heap end at first call */ - if (NULL == __sbrk_heap_end) { - __sbrk_heap_end = &_end; - } - - /* Protect heap from growing into the reserved MSP stack */ - if (__sbrk_heap_end + incr > max_heap) { - errno = ENOMEM; - return (void *)-1; - } - - prev_heap_end = __sbrk_heap_end; - __sbrk_heap_end += incr; - - return (void *)prev_heap_end; -} diff --git a/G4NEOTESTING/Core/Src/system_stm32g4xx.c b/G4NEOTESTING/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/G4NEOTESTING/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */